Datasheet A7987 (STMicroelectronics) - 7
| 制造商 | STMicroelectronics |
| 描述 | 61 V 3A asynchronous step-down switching regulator with adjustable current limitation for automotive |
| 页数 / 页 | 37 / 7 — A7987. Electrical characteristics. Symbol. Parameter. Test conditions. … |
| 文件格式/大小 | PDF / 1.4 Mb |
| 文件语言 | 英语 |
A7987. Electrical characteristics. Symbol. Parameter. Test conditions. Min. Typ. Max. Unit. DS12928. Rev 1. page 7/37
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A7987 Electrical characteristics Symbol Parameter Test conditions Min. Typ. Max. Unit
T Delay from UVLO rising to switching SSSETUP Soft- start setup time (2) 640 µs activity ISS CH CSS charging current VSS=0 4.3 5.0 5.7 mA Error amplifier VFB Voltage feedback Tj = 25 °C 0.792 0.800 0.808 V VFB Voltage feedback 0.788 0.800 0.812 V VCOMPH VFB=GND; VSS=3.2 V 3.00 3.35 3.65 V VCOMPL VFB=1 V; VSS=3.2 V 0.1 V IFB FB biasing current VFB=3.6 V 5 50 nA IOSOURCE VFB=GND; SS pin floating; VCOMP=2 V (2) 3.1 mA Unity gain buffer configuration (FB connected to COMP).COMP voltage IOSINK Output stage sinking capability variation due to I (2) OSINK injection lower 5 mA than ± 0.1·VFB AV0 Error amplifier gain (2) 100 dB Unity gain buffer configuration (FB GBWP connected to COMP). No load on COMP (2) 23 MHz pin Synchronization (fan out: 5 slave devices max.) fSYN MIN Synchronization frequency FSW floating 280 kHz ILOAD=4 mA; 2.45 VSYNOUT Master output amplitude V ILOAD=0 A; pin SYNCH floating 4.0 VSYNOW Output pulse width ILOAD=0 A; pin SYNCH floating 150 225 275 ns V SYNCH slave high level input SYNIH 2.0 V threshold VSYNIL SYNCH slave low level input threshold 1.0 V ISYN Slave SYNCH pull-down current VSYNCH = 5 V 400 650 900 µA VSYNIW Input pulse width 150 ns PGOOD VPGDTH PGOOD rising threshold VFB rising 0.67 0.70 0.74 V VPGDHYST PGOOD hysteresis VFB falling (2) 30 mV VPGDLOW PGOOD low level IPGOOD=1 mA, VFB=GND 30 mV VPGOOD=61 V;VFB=0.8 V; 0.1 I T PGDLKG PGOOD leakage current j = 25 °C µA VPGOOD=61 V;VFB=0.8 V 20 Thermal shutdown TSHDWN Thermal shutdown temperature (2) 170 °C THYS Thermal shutdown hysteresis (2) 15 °C 1. Parameter tested in static condition during testing phase. Parameter value may change over dynamic application conditions. 2. Not tested in production.
DS12928
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Rev 1 page 7/37
Document Outline Cover image Product status link / summary Features Applications Description 1 Application schematic 2 Block diagram 3 Pin settings 3.1 Pin connection 3.2 Pin description 3.3 Maximum ratings 3.4 Thermal data 3.5 ESD protection 4 Electrical characteristics 5 Functional description 5.1 Oscillator and synchronization 5.2 Soft-start 5.3 Error amplifier and light-load management 5.4 Low VIN operation 5.5 Overcurrent protection 5.6 Overtemperature protection 6 Application information 6.1 Input capacitor selection 6.2 Output capacitor selection 6.3 Inductor selection 6.4 Compensation network 6.4.1 Type II compensation network 6.4.2 Type III compensation network 6.5 Thermal considerations 6.6 Layout considerations 7 Demonstration board 8 Application ideas 8.1 Positive buck-boost 8.2 Negative buck-boost 9 Package information 9.1 HTSSOP16 package information 10 Ordering information Revision history
A7987 Electrical characteristics Symbol Parameter Test conditions Min. Typ. Max. Unit
T Delay from UVLO rising to switching SSSETUP Soft- start setup time (2) 640 µs activity ISS CH CSS charging current VSS=0 4.3 5.0 5.7 mA Error amplifier VFB Voltage feedback Tj = 25 °C 0.792 0.800 0.808 V VFB Voltage feedback 0.788 0.800 0.812 V VCOMPH VFB=GND; VSS=3.2 V 3.00 3.35 3.65 V VCOMPL VFB=1 V; VSS=3.2 V 0.1 V IFB FB biasing current VFB=3.6 V 5 50 nA IOSOURCE VFB=GND; SS pin floating; VCOMP=2 V (2) 3.1 mA Unity gain buffer configuration (FB connected to COMP).COMP voltage IOSINK Output stage sinking capability variation due to I (2) OSINK injection lower 5 mA than ± 0.1·VFB AV0 Error amplifier gain (2) 100 dB Unity gain buffer configuration (FB GBWP connected to COMP). No load on COMP (2) 23 MHz pin Synchronization (fan out: 5 slave devices max.) fSYN MIN Synchronization frequency FSW floating 280 kHz ILOAD=4 mA; 2.45 VSYNOUT Master output amplitude V ILOAD=0 A; pin SYNCH floating 4.0 VSYNOW Output pulse width ILOAD=0 A; pin SYNCH floating 150 225 275 ns V SYNCH slave high level input SYNIH 2.0 V threshold VSYNIL SYNCH slave low level input threshold 1.0 V ISYN Slave SYNCH pull-down current VSYNCH = 5 V 400 650 900 µA VSYNIW Input pulse width 150 ns PGOOD VPGDTH PGOOD rising threshold VFB rising 0.67 0.70 0.74 V VPGDHYST PGOOD hysteresis VFB falling (2) 30 mV VPGDLOW PGOOD low level IPGOOD=1 mA, VFB=GND 30 mV VPGOOD=61 V;VFB=0.8 V; 0.1 I T PGDLKG PGOOD leakage current j = 25 °C µA VPGOOD=61 V;VFB=0.8 V 20 Thermal shutdown TSHDWN Thermal shutdown temperature (2) 170 °C THYS Thermal shutdown hysteresis (2) 15 °C 1. Parameter tested in static condition during testing phase. Parameter value may change over dynamic application conditions. 2. Not tested in production.
DS12928
-
Rev 1 page 7/37
Document Outline Cover image Product status link / summary Features Applications Description 1 Application schematic 2 Block diagram 3 Pin settings 3.1 Pin connection 3.2 Pin description 3.3 Maximum ratings 3.4 Thermal data 3.5 ESD protection 4 Electrical characteristics 5 Functional description 5.1 Oscillator and synchronization 5.2 Soft-start 5.3 Error amplifier and light-load management 5.4 Low VIN operation 5.5 Overcurrent protection 5.6 Overtemperature protection 6 Application information 6.1 Input capacitor selection 6.2 Output capacitor selection 6.3 Inductor selection 6.4 Compensation network 6.4.1 Type II compensation network 6.4.2 Type III compensation network 6.5 Thermal considerations 6.6 Layout considerations 7 Demonstration board 8 Application ideas 8.1 Positive buck-boost 8.2 Negative buck-boost 9 Package information 9.1 HTSSOP16 package information 10 Ordering information Revision history