Datasheet ADAS3022-EP (Analog Devices) - 7

制造商Analog Devices
描述16-Bit, 1 MSPS, 8 Channel Data Acquisition System
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Enhanced Product. ADAS3022-EP. Parameter Test. Conditions/Comments. Min. Typ. Max. Unit1

Enhanced Product ADAS3022-EP Parameter Test Conditions/Comments Min Typ Max Unit1

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Enhanced Product ADAS3022-EP Parameter Test Conditions/Comments Min Typ Max Unit1
VDDH Capacitance, IVDDH PGIA gain = 0.16 3.0 3.5 mA PGIA gain = 0.2 3.0 3.5 mA PGIA gain = 0.4 3.5 4.0 mA PGIA gain = 0.8 5.0 5.5 mA PGIA gain = 1.6 8.5 9.5 mA PGIA gain = 3.2 15.5 17.5 mA PGIA gain = 6.4 15.5 17.5 mA All PGIA gains, PD = 1 100 μA Current at VSSH Supply, IVSSH PGIA gain = 0.16 −3.0 −2.5 mA PGIA gain = 0.2 −3.0 −2.5 mA PGIA gain = 0.4 −3.5 −3.0 mA PGIA gain = 0.8 −5.5 −4.5 mA PGIA gain = 1.6 −9.5 −8.0 mA PGIA gain = 3.2 −17.5 −15 mA PGIA gain = 6.4 −17.5 −15 mA All PGIA gains, PD = 1 10 μA Current at AVDD, IAVDD PGIA gain = 6.4, reference buffer enabled 18 21.0 mA All other PGIA gains, reference buffer 16 19.0 mA enabled PGIA gain = 6.4, reference buffer disabled 14 17.5 mA All other PGIA gains, reference buffer 12 16.0 mA disabled All PGIA gains, PD = 1 100 μA Current at DVDD, IDVDD All PGIA gains, PD = 0 2.5 3.5 mA All PGIA gains, PD = 1 10 μA Current at VIO, IVIO VIO = 3.3 V, PD = 0 0.30 1.2 mA PD = 1 10 μA Power Supply Sensitivity At TA = 25°C External reference PGIA gain = 0.16, 0.2, 0.4, and 0.8; ±0.5 LSB VDDH/VSSH ± 5% PGIA gain = 3.2, VDDH/VSSH ± 5% ±1.0 LSB PGIA gain = 6.4, VDDH/VSSH ± 5% ±2.0 LSB PGIA gain = 0.16, AVDD/DVDD ± 5% ±0.6 LSB PGIA gain = 0.2, AVDD/DVDD ± 5% ±0.8 LSB PGIA gain = 0.4, AVDD/DVDD ± 5% ±1.0 LSB PGIA gain = 0.8, AVDD/DVDD ± 5% ±1.5 LSB PGIA gain = 1.6, AVDD/DVDD ± 5% ±2.0 LSB PGIA gain = 3.2, AVDD/DVDD ± 5% ±3.5 LSB PGIA gain = 6.4, AVDD/DVDD ± 5% ±7.0 LSB TEMPERATURE RANGE Specified Performance TMIN to TMAX −55 +105 °C 1 LSB means least significant bit and changes depending on the voltage range. 2 The common-mode voltage (VCM) for a PGIA gain of 0.16 or 0.2 is 0 V. 3 All ac accuracy specifications expressed in decibels are referred to a full-scale range (FSR) and tested with an input signal at 0.5 dB below full scale, unless otherwise noted. 4 This is the output from the internal band gap reference. 5 There is no pipeline delay. Conversion results are available immediately after a conversion is complete. 6 The differential input common-mode voltage (VCM) range changes according to the maximum input range selected and the high voltage power supplies (VDDH and VSSH). Note that the specified operating input voltage of any input pin requires 2.5 V of headroom from the VDDH and VSSH supplies; therefore, (VSSH + 2.5 V) ≤ INx/COM ≤ (VDDH − 2.5 V). Rev. 0 | Page 7 of 21 Document Outline Features Enhanced Features Applications General Description Table of Contents Revision History Functional Block Diagram Specifications Timing Specifications Timing Diagrams Absolute Maximum Ratings ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics Outline Dimensions Ordering Guide