Key Sheet AD7193 (Analog Devices)

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Key Sheet AD7193 One Technology Way • P.O. Box 9106 • Norwood, MA 02062-9106, U.S.A. • Tel: 781.329.4700 • Fax: 781.461.3113 • www.analog.com Highlights of the AD7193 Low Noise, 24-Bit Sigma-Delta ADC AV DV DD AGND DD DGND REFIN1(+) REFIN1(–) AD7193 AIN1 AIN2 AIN3 AIN4 SERIAL DOUT/RDY AIN5 INTERFACE MUX DIN Σ-Δ AIN6 PGA AND ADC CONTROL AIN7 SCLK LOGIC AIN8 CS AINCOM SYNC TEMP P3 SENSOR BPDSW P2 CLOCK CIRCUITRY AGND
001
MCLK1 MCLK2 P0/REFIN2(–) P1/REFIN2(+)
1262- 1 Figure 1. Functional Block Diagram
GENERAL DESCRIPTION FEATURES AND BENEFITS
This key sheet1 provides users with an overview of the AD7193. The AD7193 offers the following features and benefits: Key attributes of the part include the fol owing: • Mains power supply interference • Designed for the measurement of wide dynamic range, low • Simultaneous 50 Hz and 60 Hz rejection at 50 SPS ODR frequency signals, such as those in pressure transducers, strain • Programmable gains of 1, 8, 16, 32, 64, and 128 gauge transducers, flow measurement, chromatography, • Automatic channel sequencer and data acquisition systems. • On-chip temperature sensor • Low power, flexible, high performance, ultralow noise, 24-bit • Internal and system calibration on chip Sigma-Delta (Σ-Δ) ADC suitable for converting low input • Option of 4.92 MHz internal clock or external crystal bandwidth analog signals with a fully flexible output data • Digital filter options include using a Sinc4 or Sinc3 filter, rate (ODR) between 4.7 SPS to 4.8 kSPS. chop enabled or disabled, fast settling, and zero latency • An on-chip low noise gain stage allows signals of small • Ultralow noise performance across the ODR range amplitude to interface directly to the ADC. • • Fully SPI, QSPI™, MICROWIRE®, and DSP compatible Combines four differential or eight pseudo differential • input channels with low power consumption. SPI configuration control • • 3-wire serial digital interface (Schmitt trigger on SCLK) With an ODR of 4.7 SPS and a gain of 128, the AD7193 boasts an rms noise of 11 nV. • User friendly, with the part being fully configurable over a 4-wire serial interface. • Available in 28-lead TSSOP and 32-lead LFCSP packages. 1 This document provides users with an overview of the AD7193; it is not a notice of performance or intent. Refer to the AD7193 data sheet for performance and more specific information about this product.
Rev. 0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Tel: 781.329.4700 www.analog.com Trademarks and registered trademarks are the property of their respective owners. Fax: 781.461.3113 ©2012 Analog Devices, Inc. All rights reserved.
Document Outline General Description Features and Benefits Key Characteristics Fundamental Specifications Noise Sinc4 Chop Disabled Filter Setting Fast Settling Filter Setting Operating the AD7193 Data Interface 4-Wire Serial Interface 3-Wire Serial Interface Data Modes Continuous Conversion Mode (Default) Continuous Read Mode Single Conversion Mode Typical Application Diagram Frequently Asked Questions Learn More and Start Designing Compatible Devices Package Diagram Getting Started