Datasheet LTC1863, LTC1867 (Analog Devices)
| 制造商 | Analog Devices |
| 描述 | 16-Bit, 8-Channel 200ksps ADCs |
| 页数 / 页 | 18 / 1 — FEATURES. DESCRIPTION. AEC-Q100 Qualified for Automotive Applications. … |
| 修订版 | E |
| 文件格式/大小 | PDF / 470 Kb |
| 文件语言 | 英语 |
FEATURES. DESCRIPTION. AEC-Q100 Qualified for Automotive Applications. Sample Rate: 200ksps
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文件文字版本
LTC1863/LTC1867 12-/16-Bit, 8-Channel 200ksps ADCs
FEATURES DESCRIPTION
n
AEC-Q100 Qualified for Automotive Applications
The LTC®1863/LTC1867 are pin-compatible, 8-channel n
Sample Rate: 200ksps
12-/16-bit A/D converters with serial I/O, and an internal n
16-Bit No Missing Codes and ±2LSB Max INL
reference. The ADCs typically draw only 1.3mA from a n
8-Channel Multiplexer with:
single 5V supply. n
Single-Ended or Differential Inputs and
The 8-channel input multiplexer can be configured for n
Unipolar or Bipolar Conversion Modes
either single-ended or differential inputs and unipolar n
SPI/MICROWIRE Serial I/O
or bipolar conversions (or combinations thereof). The n
Signal-to-Noise Ratio: 89dB
automatic nap and sleep modes benefit power sensitive n
Single 5V Operation
applications. n
On-Chip or External Reference
n Low Power: 1.3mA at 200ksps, 0.76mA at 100ksps The LTC1867’s DC performance is outstanding with a n Sleep Mode ±2LSB INL specification and no missing codes over tem- n Automatic Nap Mode Between Conversions perature. The signal-to-noise ratio (SNR) for the LTC1867 n 16-Pin Narrow SSOP Package is typically 89dB, with the internal reference. Housed in a compact, narrow 16-pin SSOP package, the
APPLICATIONS
LTC1863/LTC1867 can be used in space-sensitive as well as low-power applications. n Industrial Process Control All registered trademarks and trademarks are the property of their respective owners. n High Speed Data Acquisition n Battery Operated Systems n Multiplexed Data Acquisition Systems n Imaging Systems
BLOCK DIAGRAM Integral Nonlinearity vs Output Code (LTC1867)
2.0 1 LTC1863/LTC1867 16 1.5 CH0 V 2 15 DD CH1 GND 3 1.0 CH2 14 SDI 4 CH3 12-/16-BIT 13 ANALOG + SERIAL SDO 0.5 5 200ksps CH4 INPUT 12 – PORT SCK 6 ADC CH5 MUX 11 CS/CONV 0 7 CH6 10 V INL (LSB) 8 REF CH7/COM INTERNAL –0.5 2.5V REF –1.0 9 REFCOMP –1.5 18637 BD –2.0 0 16384 32768 49152 65536 OUTPUT CODE 18637 GO1 Rev. E Document Feedback For more information www.analog.com 1 Document Outline Features Applications Block Diagram Description Absolute Maximum Ratings Order Information Pin Configuration Converter Characteristics Dynamic Accuracy Analog Input Internal Reference Characteristics Digital Inputs and Digital Outputs Power Requirements Timing Characteristics Typical Performance Characteristics Pin Functions Typical Connection Diagram Test Circuits Timing Diagrams Applications Information Package Description Revision History Related Parts
FEATURES DESCRIPTION
n
AEC-Q100 Qualified for Automotive Applications
The LTC®1863/LTC1867 are pin-compatible, 8-channel n
Sample Rate: 200ksps
12-/16-bit A/D converters with serial I/O, and an internal n
16-Bit No Missing Codes and ±2LSB Max INL
reference. The ADCs typically draw only 1.3mA from a n
8-Channel Multiplexer with:
single 5V supply. n
Single-Ended or Differential Inputs and
The 8-channel input multiplexer can be configured for n
Unipolar or Bipolar Conversion Modes
either single-ended or differential inputs and unipolar n
SPI/MICROWIRE Serial I/O
or bipolar conversions (or combinations thereof). The n
Signal-to-Noise Ratio: 89dB
automatic nap and sleep modes benefit power sensitive n
Single 5V Operation
applications. n
On-Chip or External Reference
n Low Power: 1.3mA at 200ksps, 0.76mA at 100ksps The LTC1867’s DC performance is outstanding with a n Sleep Mode ±2LSB INL specification and no missing codes over tem- n Automatic Nap Mode Between Conversions perature. The signal-to-noise ratio (SNR) for the LTC1867 n 16-Pin Narrow SSOP Package is typically 89dB, with the internal reference. Housed in a compact, narrow 16-pin SSOP package, the
APPLICATIONS
LTC1863/LTC1867 can be used in space-sensitive as well as low-power applications. n Industrial Process Control All registered trademarks and trademarks are the property of their respective owners. n High Speed Data Acquisition n Battery Operated Systems n Multiplexed Data Acquisition Systems n Imaging Systems
BLOCK DIAGRAM Integral Nonlinearity vs Output Code (LTC1867)
2.0 1 LTC1863/LTC1867 16 1.5 CH0 V 2 15 DD CH1 GND 3 1.0 CH2 14 SDI 4 CH3 12-/16-BIT 13 ANALOG + SERIAL SDO 0.5 5 200ksps CH4 INPUT 12 – PORT SCK 6 ADC CH5 MUX 11 CS/CONV 0 7 CH6 10 V INL (LSB) 8 REF CH7/COM INTERNAL –0.5 2.5V REF –1.0 9 REFCOMP –1.5 18637 BD –2.0 0 16384 32768 49152 65536 OUTPUT CODE 18637 GO1 Rev. E Document Feedback For more information www.analog.com 1 Document Outline Features Applications Block Diagram Description Absolute Maximum Ratings Order Information Pin Configuration Converter Characteristics Dynamic Accuracy Analog Input Internal Reference Characteristics Digital Inputs and Digital Outputs Power Requirements Timing Characteristics Typical Performance Characteristics Pin Functions Typical Connection Diagram Test Circuits Timing Diagrams Applications Information Package Description Revision History Related Parts