Datasheet AD7923-EP (Analog Devices) - 3
| 制造商 | Analog Devices |
| 描述 | 4-Channel 200 kSPS, 12-Bit A/D Converter with Sequencer in 16-Lead TSSOP |
| 页数 / 页 | 9 / 3 — Enhanced Product. AD7923-EP. SPECIFICATIONS. Table 1. Parameter. EP … |
| 修订版 | A |
| 文件格式/大小 | PDF / 305 Kb |
| 文件语言 | 英语 |
Enhanced Product. AD7923-EP. SPECIFICATIONS. Table 1. Parameter. EP Version1. Unit. Test Conditions/Comments
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Enhanced Product AD7923-EP SPECIFICATIONS
AVDD = VDRIVE = 2.7 V to 5.25 V, REFIN = 2.5 V, fSCLK = 20 MHz, TA = TMIN to TMAX, unless otherwise noted. Temperature range (EP version): −55°C to +125°C.
Table 1. Parameter EP Version1 Unit Test Conditions/Comments
DYNAMIC PERFORMANCE fIN = 50 kHz sine wave, fSCLK = 20 MHz Signal-to-(Noise + Distortion) (SINAD) 70 dB min At 5 V, –40°C to +85°C 69 dB min At 5 V, 85°C to 125°C, typ 70 dB 69 dB min At 3 V typ 70 dB, –40°C to +125°C Signal-to-Noise (SNR) 70 dB min Total Harmonic Distortion (THD) −77 dB max At 5 V typ, −84 dB −73 dB max At 3 V typ,−77 dB Peak Harmonic or Spurious Noise −78 dB max At 5 V typ, −86 dB (SFDR) −76 dB max At 3 V typ, −80 dB Intermodulation Distortion (IMD) fA = 40.1 kHz, fB = 41.5 kHz Second Order Terms −90 dB typ Third Order Terms −90 dB typ Aperture Delay 10 ns typ Aperture Jitter 50 ps typ Channel to Channel Isolation −85 dB typ fIN = 400 kHz Full Power Bandwidth 8.2 MHz typ at 3 dB 1.6 MHz typ At 0.1 dB DC ACCURACY Resolution 12 Bits Integral Nonlinearity ±1 LSB max Differential Nonlinearity −0.9/+1.5 LSB max Guaranteed no missed codes to 12 bits 0 V to REFIN Input Range Straight binary output coding Offset Error ±8 LSB max Typ ±0.5 LSB Offset Error Match ±0.5 LSB max Gain Error ±1.5 LSB max Gain Error Match ±0.5 LSB max 0 V to 2 × REFIN Input Range −REFIN to +REFIN biased about REFIN with twos complement output coding Positive Gain Error ±1.5 LSB max Positive Gain Error Match ±0.5 LSB max Zero Code Error ±8 LSB max Typ ±0.8 LSB Zero Code Error Match ±0.5 LSB max Negative Gain Error ±1 LSB max Negative Gain Error Match ±0.5 LSB max ANALOG INPUT Input Voltage Range 0 to REFIN V Range bit set to 1 0 to 2 × REFIN V Range bit set to 0, AVDD = 4.75 V to 5.25 V DC Leakage Current ±1 µA max Input Capacitance 20 pF typ REFERENCE INPUT REFIN Input Voltage 2.5 V ±1% specified performance DC Leakage Current ±1 µA max REFIN Input Impedance 36 kΩ typ fSAMPLE = 200 kSPS Rev. A | Page 3 of 9 Document Outline Features Enhanced Product Features Applications General Description Functional Block Diagram Product Highlights Table of Contents Revision History Specifications Timing Specifications Absolute Maximum Ratings ESD Caution Pin Configuration and Function Description Typical Performance Characteristics Outline Dimensions Ordering Guide
Enhanced Product AD7923-EP SPECIFICATIONS
AVDD = VDRIVE = 2.7 V to 5.25 V, REFIN = 2.5 V, fSCLK = 20 MHz, TA = TMIN to TMAX, unless otherwise noted. Temperature range (EP version): −55°C to +125°C.
Table 1. Parameter EP Version1 Unit Test Conditions/Comments
DYNAMIC PERFORMANCE fIN = 50 kHz sine wave, fSCLK = 20 MHz Signal-to-(Noise + Distortion) (SINAD) 70 dB min At 5 V, –40°C to +85°C 69 dB min At 5 V, 85°C to 125°C, typ 70 dB 69 dB min At 3 V typ 70 dB, –40°C to +125°C Signal-to-Noise (SNR) 70 dB min Total Harmonic Distortion (THD) −77 dB max At 5 V typ, −84 dB −73 dB max At 3 V typ,−77 dB Peak Harmonic or Spurious Noise −78 dB max At 5 V typ, −86 dB (SFDR) −76 dB max At 3 V typ, −80 dB Intermodulation Distortion (IMD) fA = 40.1 kHz, fB = 41.5 kHz Second Order Terms −90 dB typ Third Order Terms −90 dB typ Aperture Delay 10 ns typ Aperture Jitter 50 ps typ Channel to Channel Isolation −85 dB typ fIN = 400 kHz Full Power Bandwidth 8.2 MHz typ at 3 dB 1.6 MHz typ At 0.1 dB DC ACCURACY Resolution 12 Bits Integral Nonlinearity ±1 LSB max Differential Nonlinearity −0.9/+1.5 LSB max Guaranteed no missed codes to 12 bits 0 V to REFIN Input Range Straight binary output coding Offset Error ±8 LSB max Typ ±0.5 LSB Offset Error Match ±0.5 LSB max Gain Error ±1.5 LSB max Gain Error Match ±0.5 LSB max 0 V to 2 × REFIN Input Range −REFIN to +REFIN biased about REFIN with twos complement output coding Positive Gain Error ±1.5 LSB max Positive Gain Error Match ±0.5 LSB max Zero Code Error ±8 LSB max Typ ±0.8 LSB Zero Code Error Match ±0.5 LSB max Negative Gain Error ±1 LSB max Negative Gain Error Match ±0.5 LSB max ANALOG INPUT Input Voltage Range 0 to REFIN V Range bit set to 1 0 to 2 × REFIN V Range bit set to 0, AVDD = 4.75 V to 5.25 V DC Leakage Current ±1 µA max Input Capacitance 20 pF typ REFERENCE INPUT REFIN Input Voltage 2.5 V ±1% specified performance DC Leakage Current ±1 µA max REFIN Input Impedance 36 kΩ typ fSAMPLE = 200 kSPS Rev. A | Page 3 of 9 Document Outline Features Enhanced Product Features Applications General Description Functional Block Diagram Product Highlights Table of Contents Revision History Specifications Timing Specifications Absolute Maximum Ratings ESD Caution Pin Configuration and Function Description Typical Performance Characteristics Outline Dimensions Ordering Guide