Datasheet ADL5335 (Analog Devices)
| 制造商 | Analog Devices |
| 描述 | 700 MHz to 4200 MHz Tx DGA |
| 页数 / 页 | 16 / 1 — 700 MHz to 4200 MHz,. Tx DGA. Data Sheet. ADL5335. FEATURES. FUNCTIONAL … |
| 文件格式/大小 | PDF / 525 Kb |
| 文件语言 | 英语 |
700 MHz to 4200 MHz,. Tx DGA. Data Sheet. ADL5335. FEATURES. FUNCTIONAL BLOCK DIAGRAM. VPOS1. VPOS2. VPOS3
该数据表的模型线
文件文字版本
700 MHz to 4200 MHz, Tx DGA Data Sheet ADL5335 FEATURES FUNCTIONAL BLOCK DIAGRAM VPOS1 VPOS2 VPOS3 Differential input to single-ended output conversion 1 4 13 Broad input frequency range: 700 MHz to 4200 MHz ADL5335 Maximum gain: 12.0 dB typical 11 ENBL Gain range of 20 dB typical RFIN– 2 12dB 10 RFOUT Gain step size: 0.5 dB typical 0dB TO –20dB 16 CS 3 Glitch free, thermometer-based digital step attenuator RFIN+ 15 SCLK Fast attack, gain switching with programmable gain step 14 SDIO Matched 50 Ω inputs and output 12 FA
1
APPLICATIONS
0
5 6 7 8 9
0 4-
GND1 GND2 GND3 GND4 GND5
30 6 1
RF power control and calibration in wireless transmitters
Figure 1.
GENERAL DESCRIPTION
The ADL5335 is a digital gain amplifier (DGA) optimized for size of 0.5 dB. The ADL5335 also features a fast attack function use in wireless transmitters. A differential input and single- where the gain can rapidly increase or decrease by the ended output facilitates a balun free connection between the application of a single pulse. broadband integrated transceivers with differential outputs and The use of a thermometer-based digital step attenuator (DSA) the RF gain blocks and drivers amplifiers with single-ended inputs. ensures that gain changes are fundamentally glitch free. The The gain is programmable via a standard Analog Devices, Inc., ADL5335 is packaged in a 4 mm × 4 mm, 16-lead LFCSP. A serial peripheral interface (SPI) port from a maximum gain of fully populated evaluation board and system demonstration 12.0 dB down to a minimum gain of −8.0 dB with a gain step platform (SDP)-based control software are available.
Rev. 0 Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Tel: 781.329.4700 ©2017 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. Technical Support www.analog.com
Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS DIGITAL LOGIC TIMING SPI Timing Diagram ABSOLUTE MAXIMUM RATINGS THREMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION BASIC STRUCTURE DIGITAL INTERFACE OVERVIEW Serial Peripheral Interface (SPI) Fast Attack (FA) APPLICATIONS INFORMATION BASIC CONNECTIONS OUTLINE DIMENSIONS ORDERING GUIDE
1
APPLICATIONS
0
5 6 7 8 9
0 4-
GND1 GND2 GND3 GND4 GND5
30 6 1
RF power control and calibration in wireless transmitters
Figure 1.
GENERAL DESCRIPTION
The ADL5335 is a digital gain amplifier (DGA) optimized for size of 0.5 dB. The ADL5335 also features a fast attack function use in wireless transmitters. A differential input and single- where the gain can rapidly increase or decrease by the ended output facilitates a balun free connection between the application of a single pulse. broadband integrated transceivers with differential outputs and The use of a thermometer-based digital step attenuator (DSA) the RF gain blocks and drivers amplifiers with single-ended inputs. ensures that gain changes are fundamentally glitch free. The The gain is programmable via a standard Analog Devices, Inc., ADL5335 is packaged in a 4 mm × 4 mm, 16-lead LFCSP. A serial peripheral interface (SPI) port from a maximum gain of fully populated evaluation board and system demonstration 12.0 dB down to a minimum gain of −8.0 dB with a gain step platform (SDP)-based control software are available.
Rev. 0 Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Tel: 781.329.4700 ©2017 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. Technical Support www.analog.com
Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS DIGITAL LOGIC TIMING SPI Timing Diagram ABSOLUTE MAXIMUM RATINGS THREMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION BASIC STRUCTURE DIGITAL INTERFACE OVERVIEW Serial Peripheral Interface (SPI) Fast Attack (FA) APPLICATIONS INFORMATION BASIC CONNECTIONS OUTLINE DIMENSIONS ORDERING GUIDE