Datasheet AD4110-1 (Analog Devices)

Universal Input Analog Front End with 24-Bit ADC for Industrial Process Control Systems Data Sheet AD4110-1 FEATURES GENERAL DESCRIPTION 2 software programmable input terminals
The AD4110-1 is a complete, single-channel, universal input
Current up to ±20 mA
analog-to-digital front end for industrial process control systems
Voltage up to ±10 V
where sensor type flexibility is required.
Thermocouple
The high voltage input is fully software configurable for current
RTD
or voltage signals and allows direct interface to all standard
Replaces existing 3-terminal solutions
industrial analog signal sources such as ±20 mA, ±4 mA to
Field power supply for loop powered current sensors
±20 mA, ±10 V, and all thermocouple types. Field power can be
HV input overvoltage protected up to ±30 V
supplied for loop powered current output sensors. A range of
Internal current sense resistor
excitation current sources for resistance temperature detector
Option to use external current sense resistor
(RTD) sensors and other resistive sensors are included. The
Current limited input even with no power supply
integrated, fully differential programmable gain amplifier
Diagnostic functions for overrange and open wire detect
(PGA) offers 16 gain settings from 0.2 to 24.
Fast and flexible output data rates: 5 SPS to 125 kSPS 16 noise free bits at 62 kSPS
The high voltage input can be programmed to power up in
18 noise free bits at 2.5 kSPS
either voltage mode or current mode. When programmed to
20 noise free bits at 50 SPS/60 SPS
current mode, the unique input circuit architecture provides a
Simultaneous 50 Hz and 60 Hz rejection
path for the loop current, even in the absence of the system
Serial interface for configuration and diagnostics
module power supply.
4-wire interface compatible with SPI®, QSPI™,
The AD4110-1 provides internal, front-end diagnostic functions
MICROWIRE®, and DSP
to indicate overvoltage, undervoltage, open wire, overcurrent, and
Power supply: ±12 V to ±20 V, +5 V
overtemperature conditions. The high voltage input is thermally
Operating temperature: −40°C to +105°C
protected, overcurrent limited, and overvoltage protected.
Package: 40-lead, 6 mm × 6 mm LFCSP
The AD4110-1 incorporates a precision 24-bit, Σ-Δ, analog-to-
APPLICATIONS
digital converter (ADC) offering conversion rates from 5 SPS to
Process control and industrial automation
125 kSPS with simultaneous 50 Hz and 60 Hz noise rejection.
Remote and distributed control systems Instrumentation and measurement Sensor and data acquisition FUNCTIONAL BLOCK DIAGRAM VDD VDD iREFS iREFF C(+) ADCAVDD AVDD5 AVDD5 REF(–) REF(+) REFOUT IOVDD IOVDD ADCDVDD FIELD iEXC SENSORS 1.8V 1.8V RTD FIELD LDO LDO RTD NC VDD MUX POWER REF SUPPLY OVERTEMPERATURE R IN(+) D SENSOR CLKIO CLKIO E AIN(+) RT ITT M R E IRE S NO POWER L CS N -W MODE A DUCE UP EXRF 4 VSS S DIGITAL SCLK TR CO PGA SWITCH 24 BIT Σ-∆ ADC A O EXRS FILTERING AFE/ADC IRE RAN SENSE CONTROL EXER PROCESSING SERIAL DIN W iCOMP VDD RM R 20m T AND INTERFACE 3- IPL ± HE CONTROL DIAGNOSTICS T CRC DOUT/RDY T IN(–) SENSE L IRE TO ±10V R CHANNEL SELECT AIN(–) W A MU ADR1 2- ±4m VBIAS ADR0 AD4110-1 VSS AGND SYNC AGND ERR
1 00 9-
VSS VSS VPP C(–) AIN1(LV) AIN2(LV) AINCOM(LV) DGND AGND AGND AGND
26 6 1 Figure 1. Functional Block Diagram
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Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS TIMING SPECIFICATIONS Timing Diagrams ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION POWER SUPPLY SEQUENCE PROTECTION DIODE ANALOG INPUT PULL-UP/PULL-DOWN CURRENTS ANTIALIASING FILTER RTD EXCITATION CURRENTS FIELD POWER SUPPLY MODE NO POWER SUPPLY MODE BIAS VOLTAGE GENERATOR PGA CALIBRATION REGISTERS SERIAL INTERFACE CLOCK ADC ADC FILTER REGISTERS ADC GAIN AND OFFSET REGISTERS NOISE PERFORMANCE AND RESOLUTION MODES OF OPERATION DEFAULT MODE OF OPERATION ON POWER-UP CHANGING THE DEFAULT MODE OF OPERATION FOR FUTURE POWER-UP CYCLES POWER SUPPLY REQUIREMENTS SYSTEM CLOCK REQUIREMENTS BIPOLAR AND UNIPOLAR OUTPUT AUXILIARY LOW VOLTAGE INPUTS DIGITAL FILTER CONTINUOUS CONVERSION MODE INPUT AUTO SEQUENCING SINGLE CONVERSION MODE ADC CONVERSION DELAY BIAS VOLTAGE GENERATOR ANTIALIASING FILTER CIRCUIT CURRENT MODE Transimpedance Gain Using an External Sense Resistor VOLTAGE AND THERMOCOUPLE MODE Input Scaling for Voltage Mode Thermocouple Inputs RTD MODE Generating RTD Currents with an External Resistor Excitation Currents RTD Initial Drift 4-Wire RTD 3-Wire RTD 2-Wire RTD Alternative 3-Wire Configuration FIELD POWER SUPPLY MODE Overvoltage Protection NO POWER SUPPLY MODE Voltage Mode Current Mode System Redundancy GAIN CALIBRATION DATA REGISTER GAIN CALIBRATION IN VOLTAGE MODE GAIN CALIBRATION IN CURRENT MODE SCALING FACTOR AUTOCALIBRATION MODES APPLICATION EXAMPLES Example 1 Example 2 DIAGNOSTICS AND PROTECTION DIAGNOSTIC FLAGS ERROR PIN OVERTEMPERATURE DETECTION AND THERMAL SHUTDOWN OVERVOLTAGE AND UNDERVOLTAGE DETECTION OVERVOLTAGE PROTECTION DIAGNOSING OVERVOLTAGE AND UNDERVOLTAGE CONDITIONS OPEN WIRE DETECTION DIAGNOSTICS FOR RTD MEASUREMENTS AND RTD FLAGS NOISE, SETTLING TIME, AND DIGITAL FILTERING DIGITAL FILTER SINC5 + SINC1 FILTER SINC3 FILTER ENHANCED 50 HZ AND 60 HZ REJECTION FILTERS RTD MODE NOISE PERFORMANCE SERIAL PERIPHERAL INTERFACE RESETTING THE AD4110-1 SPI COMMAND TO COMMUNICATIONS REGISTER DOUT/ PIN WRITE OPERATION READ OPERATION MULTIPLE DEVICES ON THE SPI BUS CRC CHECKSUM CRC CHECKSUM METHODS Polynomial Calculation Polynomial CRC Calculation of a 24-Bit Word: 0x654321 (Eight Command Bits and 16-Bit Data) XOR Calculation REGISTER DETAILS AFE REGISTER MAP AFE REGISTER DESCRIPTIONS AFE_TOP_STATUS Register AFE_CNTRL1 Register AFE_CLK_CTRL Register AFE_CNTRL2 Register PGA_RTD_CTRL Register AFE_ERR_DISABLE Register AFE_DETAIL_STATUS Register AFE_CAL_DATA Register AFE_RSENSE_DATA Register NO_PWR_DEFAULT_SEL Register NO_PWR_DEFAULT_STATUS Register ADC REGISTER MAP ADC REGISTER DESCRIPTIONS ADC_STATUS Register ADC_MODE Register ADC_INTERFACE Register ADC_CONFIG Register Data Register Filter Register ADC_GPIO_CONFIG Register ID Register ADC_OFFSET0 Register ADC_OFFSET1 Register ADC_OFFSET2 Register ADC_OFFSET3 Register ADC_GAIN0 Register ADC_GAIN1 Register ADC_GAIN2 Register ADC_GAIN3 Register OUTLINE DIMENSIONS ORDERING GUIDE