Datasheet AD7766-KGD (Analog Devices) - 3
| 制造商 | Analog Devices |
| 描述 | 24-Bit, 8.5 mW, 109 dB, 128 kSPS/64 kSPS/32 kSPS ADCs |
| 页数 / 页 | 11 / 3 — Known Good Die. AD7766-2-KGD. SPECIFICATIONS. Table 2. Parameter. Test … |
| 文件格式/大小 | PDF / 242 Kb |
| 文件语言 | 英语 |
Known Good Die. AD7766-2-KGD. SPECIFICATIONS. Table 2. Parameter. Test Conditions/Comments. Min. Typ. Max. Unit
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Known Good Die AD7766-2-KGD SPECIFICATIONS
AVDD = DVDD = 2.5 V ± 5%, VDRIVE = 1.8 V to 3.6 V, VREF+ = 5 V, MCLK = 1 MHz, common-mode input = VREF+/2, TA = −40°C to +105°C, unless otherwise noted.
Table 2. Parameter Test Conditions/Comments Min Typ Max Unit
OUTPUT DATA RATE (ODR) Decimate by 32 32 kHz ANALOG INPUT Differential Input Voltage VIN+ − VIN− ±VREF+ V p-p Absolute Input Voltage VIN+ −0.1 +VREF+ + 0.1 V VIN− −0.1 +VREF+ + 0.1 V Common-Mode Input Voltage VREF+/2 − 5% VREF+/2 VREF+/2 + 5% V Input Capacitance 22 pF DYNAMIC PERFORMANCE Decimate by 32, ODR = 32 kHz Dynamic Range Shorted inputs 114 115.5 dB Signal-to-Noise Ratio (SNR) Ful -scale input amplitude, 1 kHz tone 112 113.5 dB Spurious-Free Dynamic Range (SFDR) Ful -scale input amplitude, 1 kHz tone −128 −116 dB Total Harmonic Distortion (THD) Ful -scale input amplitude, 1 kHz tone −112 −103 dB Intermodulation Distortion (IMD) Tone A = 11.7 kHz, Tone B = 12.3 kHz dB Second-Order Terms −137 dB Third-Order Terms −108 dB DC ACCURACY For all devices Resolution No missing codes 24 Bits Differential Nonlinearity Guaranteed monotonic to 24 bits Integral Nonlinearity 16-bit linearity ±6 ±15 ppm Zero Error 20 µV Gain Error 0.0075 0.075 % FS Zero Error Drift 15 nV/°C Gain Error Drift 0.4 ppm/°C Common-Mode Rejection Ratio 50 Hz tone −110 dB DIGITAL FILTER RESPONSE Group Delay 37/ODR µs Settling Time (Latency) Complete settling 74/ODR µs Pass-Band Ripple ±0.005 dB Pass Band 0.453 × ODR Hz −3 dB Bandwidth 0.49 × ODR Hz Stop-Band Frequency 0.547 × ODR Hz Stop-Band Attenuation 100 dB REFERENCE INPUT VREF+ Input Voltage 2.4 2 × AVDD V DIGITAL INPUTS (Logic Levels) Logic Low Voltage (VIL) −0.3 +0.3 × VDRIVE V Logic High Voltage (VIH) 0.7 × VDRIVE VDRIVE + 0.3 V Input Leakage Current ±1 µA/pin Input Capacitance 5 pF Master Clock Rate 1.024 MHz Serial Clock Rate 1/t8 Hz DIGITAL OUTPUTS Data Format Serial 24 bits, twos complement (MSB first) Logic Low Voltage (VOL) Sink current (ISINK) = +500 µA 0.4 V Logic High Voltage(VOH) Source current (ISOURCE) = −500 µA VDRIVE − 0.3 V Rev. 0 | Page 3 of 11 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM RELATED DEVICES TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS TIMING SPECIFICATIONS Timing Diagrams ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS OUTLINE DIMENSIONS DIE SPECIFICATIONS AND ASSEMBLY RECOMMENDATIONS ORDERING GUIDE
AVDD = DVDD = 2.5 V ± 5%, VDRIVE = 1.8 V to 3.6 V, VREF+ = 5 V, MCLK = 1 MHz, common-mode input = VREF+/2, TA = −40°C to +105°C, unless otherwise noted.
Table 2. Parameter Test Conditions/Comments Min Typ Max Unit
OUTPUT DATA RATE (ODR) Decimate by 32 32 kHz ANALOG INPUT Differential Input Voltage VIN+ − VIN− ±VREF+ V p-p Absolute Input Voltage VIN+ −0.1 +VREF+ + 0.1 V VIN− −0.1 +VREF+ + 0.1 V Common-Mode Input Voltage VREF+/2 − 5% VREF+/2 VREF+/2 + 5% V Input Capacitance 22 pF DYNAMIC PERFORMANCE Decimate by 32, ODR = 32 kHz Dynamic Range Shorted inputs 114 115.5 dB Signal-to-Noise Ratio (SNR) Ful -scale input amplitude, 1 kHz tone 112 113.5 dB Spurious-Free Dynamic Range (SFDR) Ful -scale input amplitude, 1 kHz tone −128 −116 dB Total Harmonic Distortion (THD) Ful -scale input amplitude, 1 kHz tone −112 −103 dB Intermodulation Distortion (IMD) Tone A = 11.7 kHz, Tone B = 12.3 kHz dB Second-Order Terms −137 dB Third-Order Terms −108 dB DC ACCURACY For all devices Resolution No missing codes 24 Bits Differential Nonlinearity Guaranteed monotonic to 24 bits Integral Nonlinearity 16-bit linearity ±6 ±15 ppm Zero Error 20 µV Gain Error 0.0075 0.075 % FS Zero Error Drift 15 nV/°C Gain Error Drift 0.4 ppm/°C Common-Mode Rejection Ratio 50 Hz tone −110 dB DIGITAL FILTER RESPONSE Group Delay 37/ODR µs Settling Time (Latency) Complete settling 74/ODR µs Pass-Band Ripple ±0.005 dB Pass Band 0.453 × ODR Hz −3 dB Bandwidth 0.49 × ODR Hz Stop-Band Frequency 0.547 × ODR Hz Stop-Band Attenuation 100 dB REFERENCE INPUT VREF+ Input Voltage 2.4 2 × AVDD V DIGITAL INPUTS (Logic Levels) Logic Low Voltage (VIL) −0.3 +0.3 × VDRIVE V Logic High Voltage (VIH) 0.7 × VDRIVE VDRIVE + 0.3 V Input Leakage Current ±1 µA/pin Input Capacitance 5 pF Master Clock Rate 1.024 MHz Serial Clock Rate 1/t8 Hz DIGITAL OUTPUTS Data Format Serial 24 bits, twos complement (MSB first) Logic Low Voltage (VOL) Sink current (ISINK) = +500 µA 0.4 V Logic High Voltage(VOH) Source current (ISOURCE) = −500 µA VDRIVE − 0.3 V Rev. 0 | Page 3 of 11 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM RELATED DEVICES TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS TIMING SPECIFICATIONS Timing Diagrams ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS OUTLINE DIMENSIONS DIE SPECIFICATIONS AND ASSEMBLY RECOMMENDATIONS ORDERING GUIDE