Datasheet AD9257-EP (Analog Devices) - 7

Data Sheet AD9257-EP Timing Diagrams N – 1 VIN± x tA N tEH tEL CLK– CLK+ tCPD DCO– DCO+ tFCO tFRAME FCO– FCO+ tPD tDATA D– x MSB D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 MSB D12
2
N – 17 N – 17 N – 17 N – 17 N – 17 N – 17 N – 17 N – 17 N – 17 N – 17 N – 17 N – 17 N – 17 N – 17 N – 16 N – 16
-00 0 74
D+ x
2 1 Figure 2. Word Wise DDR,1× Frame, 14-Bit Output Mode (Default)
N – 1 VIN± x tA N tEH tEL CLK– CLK+ tCPD DCO– DCO+ t t FCO FRAME FCO– FCO+ tPD tDATA D– x MSB D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 MSB D10 N – 17 N – 17 N – 17 N – 17 N – 17 N – 17 N – 17 N – 17 N – 17 N – 17 N – 17 N – 17 N – 16 N – 16
-003
D+ x
740 12 Figure 3. Word Wise DDR, 1× Frame, 12-Bit Output Mode Rev. A | Page 7 of 13 Document Outline FEATURES ENHANCED PRODUCT FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM PRODUCT HIGHLIGHTS TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS DC SPECIFICATIONS AC SPECIFICATIONS DIGITAL SPECIFICATIONS SWITCHING SPECIFICATIONS TIMING SPECIFICATIONS Timing Diagrams ABSOLUTE MAXIMUM RATINGS THERMAL CHARACTERISTICS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS OUTLINE DIMENSIONS ORDERING GUIDE