Datasheet ADL5331 (Analog Devices) - 10

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ADL5331 Data Sheet 5V
Note that the ADL5331, because of its positive gain slope, in an AGC application requires a detector with a negative VOUT/
120nH
RFIN slope. As an example, the AD8319 in the example in
120nH
Figure 19 has a negative slope. The AD8362 rms detector, however, has a positive slope. Extra circuitry is necessary to
ADL5331 10nF RF VGA 10nF
compensate for this.
RFIN INHI OPHI RFOUT
To operate the ADL5331 in an AGC loop, a sample of the
INLO OPLO 10nF 10nF
output RF must be fed back to the detector (typically using 019
ETC1-1-13
a directional coupler and additional attenuation). A setpoint 07593- Figure 17. Single-Ended Drive with Balanced Output voltage is applied to the VSET input of the detector while VOUT is connected to the GAIN pin of the ADL5331. Based on the The device can be driven single-ended with similar perfor- detector’s defined linear-in-dB relationship between VOUT mance, as shown in Figure 17. The single-ended input interface and the RFIN signal, the detector adjusts the voltage on the can be implemented by driving one of the input terminals and GAIN pin (the detector’s VOUT pin is an error amplifier terminating the unused input to ground. To achieve the optimal output) until the level at the RF input corresponds to the applied performance, the output must remain balanced. In the case of setpoint voltage. The V Figure 17, a transformer balun is used at the output. GAIN setting settles to a value that results in the correct balance between the input signal level at the
GAIN CONTROL INPUT
detector and the setpoint voltage. When the VGA is enabled, the voltage applied to the GAIN pin The detector’s error amplifier uses CLPF, a ground-referenced sets the gain. The input impedance of the GAIN pin is 1 MΩ. capacitor pin, to integrate the error signal (in the form of a The gain control voltage range is between 0.1 V and 1.4 V, current). A capacitor must be connected to CLPF to set the which corresponds to a typical gain range between −15 dB and loop bandwidth and to ensure loop stability. +15 dB.
5V 5V
The 1 dB input compression point remains constant at 3 dBm through the majority of the gain control range, as shown in
VPOS COMM
Figure 7 through Figure 9. The output compression point
RFIN
increases decibel for decibel with increasing gain setting. The
INHI OPHI ADL5331
noise floor is constant up to V
DIRECTIONAL
GAIN = 1 V where it begins to rise.
INLO OPLO COUPLER
The bandwidth on the gain control pin is approximately 3 MHz.
GAIN
Figure 10 shows the response time of a pulse on the VGAIN pin.
ATTENUATOR
Although the ADL5331 provides accurate gain control, precise
VOUT
regulation of output power can be achieved with an automatic
LOG AMP OR TruPwr
gain control (AGC) loop. Figure 18 shows the ADL5331 in an
DETECTOR
AGC loop. The addition of a log amp or a TruPwr™ detector
DAC VSET RFIN
(such as the AD8362) al ows the AGC to have improved
CLPF
temperature stability over a wide output power control range. 020 07593- Figure 18. ADL5331 in AGC Loop Rev. A | Page 10 of 15 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION APPLICATIONS INFORMATION BASIC CONNECTIONS GAIN CONTROL INPUT CMTS TRANSMIT APPLICATION Interfacing to AD9789 INTERFACING TO AN IQ MODULATOR SOLDERING INFORMATION EVALUATION BOARD SCHEMATIC OUTLINE DIMENSIONS ORDERING GUIDE