Datasheet ADRF6518 (Analog Devices) - 10
| 制造商 | Analog Devices |
| 描述 | 1.1 GHz Variable Gain Amplifiers and Baseband Programmable Filters |
| 页数 / 页 | 39 / 10 — ADRF6518. Data Sheet. ns). ATCH ( M. dB). N (. AI G. LAY MI –2 P DE –4. … |
| 修订版 | A |
| 文件格式/大小 | PDF / 1.6 Mb |
| 文件语言 | 英语 |
ADRF6518. Data Sheet. ns). ATCH ( M. dB). N (. AI G. LAY MI –2 P DE –4. BANDWIDTH = 15MHz. BANDWIDTH = 7MHz. GR –6. –10. FREQUENCY (MHz). ATCH (
该数据表的模型线
文件文字版本
ADRF6518 Data Sheet 31 10 8 6 30 ns) 4 ATCH ( M 2 dB) ST 29 N ( 0 AI G LAY MI –2 P DE –4 BANDWIDTH = 15MHz 28 OU BANDWIDTH = 7MHz GR –6 –8 27 –10 1 11 21 31 41 51 61
017
2 4 6 8 10 12 14 16 18 20 22 24
119
FREQUENCY (MHz)
11449-
FREQUENCY (MHz)
11449- Figure 17. Gain vs. Frequency over BW Setting (Linear); Scaled to Show Figure 20. IQ Group Delay Mismatch vs. Frequency Peaking (BW = 7 MHz and BW = 15 MHz)
40 5 35 4 30 3 ns) 25 2 20 ATCH ( 1 dB) SM N ( 15 0 AI G 10 LAY MI –1 5 P DE –2 BANDWIDTH = 30MHz OU BANDWIDTH = 60MHz 0 GR –3 –5 –4 –10 –5 1 10 100
117 120
5 15 25 35 45 55 65 FREQUENCY (MHz)
11449-
FREQUENCY (MHz)
11449- Figure 18. Gain vs. Frequency over BW Setting (Log); Figure 21. IQ Group Delay Mismatch vs. Frequency VGN1 = 1 V, VGN2 = 0.7 V, VGN3 = 0.75 V (BW = 30 MHz and BW = 60 MHz)
FREQUENCY (MHz) 0 0.2 0.4 0.6 0.8 1.0 1.2 100 0.50 BANDWIDTH = 7MHz 90 0.40 80 0.30 70 0.20 (ns) 60 dB) 0.10 LAY 50 0.00 DE ATCH ( UP BANDWIDTH = 15MHz 40 SM –0.10 BANDWIDTH = 63MHz RO MI BANDWIDTH = 1MHz G 30 –0.20 BANDWIDTH = 30MHz 20 –0.30 BANDWIDTH = 60MHz 10 –0.40 0 –0.50 2 20
118
0 10 20 30 40 50 60
121
FREQUENCY (MHz)
11449-
FREQUENCY (MHz)
11449- Figure 19. Group Delay vs. Frequency; VGN1/VGN2/VGN3 = 0 V Figure 22. IQ Amplitude Mismatch vs. Frequency; VGN1/VGN2/VGN3 = 0 V Rev. A | Page 10 of 39 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION REVISION HISTORY SPECIFICATIONS TIMING DIAGRAMS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS FILTER MODE BYPASS MODE MIXED POWER AND FILTER MODES CHARACTERIZATION NOISE FIGURE CALCULATION REGISTER MAP AND CODES THEORY OF OPERATION INPUT VGAs Driving ADRF6518 Single-Ended PEAK DETECTOR PROGRAMMABLE FILTERS Bypassing the Filters VARIABLE GAIN AMPLIFIERS (VGAs) OUTPUT BUFFERS/ADC DRIVERS DC OFFSET COMPENSATION LOOP PROGRAMMING THE ADRF6518 NOISE CHARACTERISTICS DISTORTION CHARACTERISTICS MAXIMIZING THE DYNAMIC RANGE KEY PARAMETERS FOR QUADRATURE-BASED RECEIVERS APPLICATIONS INFORMATION BASIC CONNECTIONS SUPPLY DECOUPLING INPUT SIGNAL PATH OUTPUT SIGNAL PATH DC OFFSET COMPENSATION LOOP ENABLED COMMON-MODE BYPASSING SERIAL PORT CONNECTIONS ENABLE/DISABLE FUNCTION GAIN PIN DECOUPLING PEAK DETECTOR CONNECTIONS ERROR VECTOR MAGNITUDE (EVM) PERFORMANCE EVM TEST SETUP EVM MEASUREMENT EVM SYSTEM MEASUREMENT EFFECT OF FILTER BW ON EVM PULL-DOWN RESISTORS FOR DISABLE FUNCTION INSTABILITY AT HIGH GAIN IN FILTER BYPASS MODE INSTABILITY AT LOW FILTER CORNERS AND LOW POWER MODE PEAK DETECTOR BANDWIDTH AND SLEW RATE LINEAR OPERATION OF THE ADRF6518 EVALUATION BOARD EVALUATION BOARD CONTROL SOFTWARE SCHEMATICS AND ARTWORK OUTLINE DIMENSIONS ORDERING GUIDE
017
2 4 6 8 10 12 14 16 18 20 22 24
119
FREQUENCY (MHz)
11449-
FREQUENCY (MHz)
11449- Figure 17. Gain vs. Frequency over BW Setting (Linear); Scaled to Show Figure 20. IQ Group Delay Mismatch vs. Frequency Peaking (BW = 7 MHz and BW = 15 MHz)
40 5 35 4 30 3 ns) 25 2 20 ATCH ( 1 dB) SM N ( 15 0 AI G 10 LAY MI –1 5 P DE –2 BANDWIDTH = 30MHz OU BANDWIDTH = 60MHz 0 GR –3 –5 –4 –10 –5 1 10 100
117 120
5 15 25 35 45 55 65 FREQUENCY (MHz)
11449-
FREQUENCY (MHz)
11449- Figure 18. Gain vs. Frequency over BW Setting (Log); Figure 21. IQ Group Delay Mismatch vs. Frequency VGN1 = 1 V, VGN2 = 0.7 V, VGN3 = 0.75 V (BW = 30 MHz and BW = 60 MHz)
FREQUENCY (MHz) 0 0.2 0.4 0.6 0.8 1.0 1.2 100 0.50 BANDWIDTH = 7MHz 90 0.40 80 0.30 70 0.20 (ns) 60 dB) 0.10 LAY 50 0.00 DE ATCH ( UP BANDWIDTH = 15MHz 40 SM –0.10 BANDWIDTH = 63MHz RO MI BANDWIDTH = 1MHz G 30 –0.20 BANDWIDTH = 30MHz 20 –0.30 BANDWIDTH = 60MHz 10 –0.40 0 –0.50 2 20
118
0 10 20 30 40 50 60
121
FREQUENCY (MHz)
11449-
FREQUENCY (MHz)
11449- Figure 19. Group Delay vs. Frequency; VGN1/VGN2/VGN3 = 0 V Figure 22. IQ Amplitude Mismatch vs. Frequency; VGN1/VGN2/VGN3 = 0 V Rev. A | Page 10 of 39 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION REVISION HISTORY SPECIFICATIONS TIMING DIAGRAMS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS FILTER MODE BYPASS MODE MIXED POWER AND FILTER MODES CHARACTERIZATION NOISE FIGURE CALCULATION REGISTER MAP AND CODES THEORY OF OPERATION INPUT VGAs Driving ADRF6518 Single-Ended PEAK DETECTOR PROGRAMMABLE FILTERS Bypassing the Filters VARIABLE GAIN AMPLIFIERS (VGAs) OUTPUT BUFFERS/ADC DRIVERS DC OFFSET COMPENSATION LOOP PROGRAMMING THE ADRF6518 NOISE CHARACTERISTICS DISTORTION CHARACTERISTICS MAXIMIZING THE DYNAMIC RANGE KEY PARAMETERS FOR QUADRATURE-BASED RECEIVERS APPLICATIONS INFORMATION BASIC CONNECTIONS SUPPLY DECOUPLING INPUT SIGNAL PATH OUTPUT SIGNAL PATH DC OFFSET COMPENSATION LOOP ENABLED COMMON-MODE BYPASSING SERIAL PORT CONNECTIONS ENABLE/DISABLE FUNCTION GAIN PIN DECOUPLING PEAK DETECTOR CONNECTIONS ERROR VECTOR MAGNITUDE (EVM) PERFORMANCE EVM TEST SETUP EVM MEASUREMENT EVM SYSTEM MEASUREMENT EFFECT OF FILTER BW ON EVM PULL-DOWN RESISTORS FOR DISABLE FUNCTION INSTABILITY AT HIGH GAIN IN FILTER BYPASS MODE INSTABILITY AT LOW FILTER CORNERS AND LOW POWER MODE PEAK DETECTOR BANDWIDTH AND SLEW RATE LINEAR OPERATION OF THE ADRF6518 EVALUATION BOARD EVALUATION BOARD CONTROL SOFTWARE SCHEMATICS AND ARTWORK OUTLINE DIMENSIONS ORDERING GUIDE