Datasheet ADL5336 (Analog Devices) - 2
| 制造商 | Analog Devices |
| 描述 | Cascadable IF VGAs with Programmable RMS Detectors |
| 页数 / 页 | 30 / 2 — ADL5336. Data Sheet. TABLE OF CONTENTS. REVISION HISTORY 4/2018—Rev. B to … |
| 修订版 | C |
| 文件格式/大小 | PDF / 1.2 Mb |
| 文件语言 | 英语 |
ADL5336. Data Sheet. TABLE OF CONTENTS. REVISION HISTORY 4/2018—Rev. B to Rev. C. 6/2011—Rev. 0 to Rev. A
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ADL5336 Data Sheet TABLE OF CONTENTS
Features .. 1 Basic Connections .. 20 Applications ... 1 Supply Decoupling ... 20 Functional Block Diagram .. 1 Input Signal Path .. 20 General Description ... 1 Output Signal Path ... 20 Revision History ... 2 Detector Output and Gain Pin ... 21 Specifications ... 3 Common-Mode Bypassing ... 21 Timing Diagrams .. 5 Serial Port Connections ... 21 Absolute Maximum Ratings .. 6 Mode and Enable Connections .. 21 ESD Caution .. 6 Error Vector Magnitude (EVM) ... 21 Pin Configuration and Function Descriptions ... 7 Effect of CAGC on EVM ... 22 Typical Performance Characteristics ... 8 AGC Insensitivity to Modulation Type ... 22 Theory of Operation .. 17 Effect of Setpoint on EVM .. 23 Circuit Description... 17 Cascaded VGA/AGC Performance .. 23 Gain Control Interface ... 18 Evaluation Board Layout ... 25 Input and Output Impedances .. 18 Bill of Materials (BOM) ... 28 AGC Operation ... 18 Evaluation Board Control Software ... 29 Register Map and Codes .. 19 Outline Dimensions ... 30 Applications Information .. 20 Ordering Guide .. 30
REVISION HISTORY 4/2018—Rev. B to Rev. C
Changes to Figure 4 .. 7
6/2011—Rev. 0 to Rev. A
Updated Outline Dimensions ... 30 Changes to Table 1 ... 3 Changes to Ordering Guide .. 30 Changes to Typical Performance Charteristics Section Format ... 8
2/2012—Rev. A to Rev. B
Changes to Figure 7 and Figure 10 .. 8 Changes to Figure 70 .. 25 Changes to Figure 11 to Figure 16 ... 9 Changes to Figure 71 and Figure 72 ... 26 Changes to Figure 17 to Figure 22 .. 10 Changes to Table 11 .. 28 Changes to Figure 23 and Figure 26... 11 Changes to Figure 73 .. 29 Inserted Figure 53 and Figure 56; Renumbered Sequentially .. 16 Updated Outline Dimensions ... 30 Changes to Figure 60 .. 17 Changes to Figure 61 Caption .. 18 Changes to Cascaded VGA/AGC Performance Section and Figure 68 .. 24 Changes to Figure 72 .. 26
2/2011—Revision 0: Initial Version
Rev. C | Page 2 of 30 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS TIMING DIAGRAMS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION CIRCUIT DESCRIPTION GAIN CONTROL INTERFACE INPUT AND OUTPUT IMPEDANCES AGC OPERATION REGISTER MAP AND CODES APPLICATIONS INFORMATION BASIC CONNECTIONS SUPPLY DECOUPLING INPUT SIGNAL PATH OUTPUT SIGNAL PATH DETECTOR OUTPUT AND GAIN PIN COMMON-MODE BYPASSING SERIAL PORT CONNECTIONS MODE AND ENABLE CONNECTIONS ERROR VECTOR MAGNITUDE (EVM) EFFECT OF CAGC ON EVM AGC INSENSITIVITY TO MODULATION TYPE EFFECT OF SETPOINT ON EVM CASCADED VGA/AGC PERFORMANCE EVALUATION BOARD LAYOUT BILL OF MATERIALS (BOM) EVALUATION BOARD CONTROL SOFTWARE OUTLINE DIMENSIONS ORDERING GUIDE
ADL5336 Data Sheet TABLE OF CONTENTS
Features .. 1 Basic Connections .. 20 Applications ... 1 Supply Decoupling ... 20 Functional Block Diagram .. 1 Input Signal Path .. 20 General Description ... 1 Output Signal Path ... 20 Revision History ... 2 Detector Output and Gain Pin ... 21 Specifications ... 3 Common-Mode Bypassing ... 21 Timing Diagrams .. 5 Serial Port Connections ... 21 Absolute Maximum Ratings .. 6 Mode and Enable Connections .. 21 ESD Caution .. 6 Error Vector Magnitude (EVM) ... 21 Pin Configuration and Function Descriptions ... 7 Effect of CAGC on EVM ... 22 Typical Performance Characteristics ... 8 AGC Insensitivity to Modulation Type ... 22 Theory of Operation .. 17 Effect of Setpoint on EVM .. 23 Circuit Description... 17 Cascaded VGA/AGC Performance .. 23 Gain Control Interface ... 18 Evaluation Board Layout ... 25 Input and Output Impedances .. 18 Bill of Materials (BOM) ... 28 AGC Operation ... 18 Evaluation Board Control Software ... 29 Register Map and Codes .. 19 Outline Dimensions ... 30 Applications Information .. 20 Ordering Guide .. 30
REVISION HISTORY 4/2018—Rev. B to Rev. C
Changes to Figure 4 .. 7
6/2011—Rev. 0 to Rev. A
Updated Outline Dimensions ... 30 Changes to Table 1 ... 3 Changes to Ordering Guide .. 30 Changes to Typical Performance Charteristics Section Format ... 8
2/2012—Rev. A to Rev. B
Changes to Figure 7 and Figure 10 .. 8 Changes to Figure 70 .. 25 Changes to Figure 11 to Figure 16 ... 9 Changes to Figure 71 and Figure 72 ... 26 Changes to Figure 17 to Figure 22 .. 10 Changes to Table 11 .. 28 Changes to Figure 23 and Figure 26... 11 Changes to Figure 73 .. 29 Inserted Figure 53 and Figure 56; Renumbered Sequentially .. 16 Updated Outline Dimensions ... 30 Changes to Figure 60 .. 17 Changes to Figure 61 Caption .. 18 Changes to Cascaded VGA/AGC Performance Section and Figure 68 .. 24 Changes to Figure 72 .. 26
2/2011—Revision 0: Initial Version
Rev. C | Page 2 of 30 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS TIMING DIAGRAMS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION CIRCUIT DESCRIPTION GAIN CONTROL INTERFACE INPUT AND OUTPUT IMPEDANCES AGC OPERATION REGISTER MAP AND CODES APPLICATIONS INFORMATION BASIC CONNECTIONS SUPPLY DECOUPLING INPUT SIGNAL PATH OUTPUT SIGNAL PATH DETECTOR OUTPUT AND GAIN PIN COMMON-MODE BYPASSING SERIAL PORT CONNECTIONS MODE AND ENABLE CONNECTIONS ERROR VECTOR MAGNITUDE (EVM) EFFECT OF CAGC ON EVM AGC INSENSITIVITY TO MODULATION TYPE EFFECT OF SETPOINT ON EVM CASCADED VGA/AGC PERFORMANCE EVALUATION BOARD LAYOUT BILL OF MATERIALS (BOM) EVALUATION BOARD CONTROL SOFTWARE OUTLINE DIMENSIONS ORDERING GUIDE