Datasheet AD8432 (Analog Devices) - 5
| 制造商 | Analog Devices |
| 描述 | Dual-Channel Ultralow Noise Amplifier with Selectable Gain and Input Impedance |
| 页数 / 页 | 32 / 5 — Data Sheet. AD8432. ABSOLUTE MAXIMUM RATINGS. MAXIMUM POWER DISSIPATION. … |
| 修订版 | D |
| 文件格式/大小 | PDF / 892 Kb |
| 文件语言 | 英语 |
Data Sheet. AD8432. ABSOLUTE MAXIMUM RATINGS. MAXIMUM POWER DISSIPATION. Table 2. Parameter Rating. ESD CAUTION. THERMAL RESISTANCE
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Data Sheet AD8432 ABSOLUTE MAXIMUM RATINGS MAXIMUM POWER DISSIPATION Table 2.
The maximum safe power dissipation for the AD8432 is limited
Parameter Rating
by the associated rise in junction temperature (T Voltage J) on the die. At approximately 150°C, which is the glass transition temperature, Supply Voltage 5.5 V the properties of the plastic change. Even temporarily exceeding Input Voltage 0 V to VPS this temperature limit may change the stresses that the package Power Dissipation 120 mW exerts on the die, permanently shifting the parametric performance Temperature of the amplifiers. Exceeding a temperature of 150°C for an Operating Temperature –40°C to +85°C extended period can cause changes in silicon devices, potentially Storage Temperature –65°C to +150°C resulting in a loss of functionality. Package Glass Transition Temperature (TG) 150°C Lead Temperature (Soldering, 60 sec) 300°C Stresses at or above those listed under Absolute Maximum
ESD CAUTION
Ratings may cause permanent damage to the product. This is a stress rating only; functional operation of the product at these or any other conditions above those indicated in the operational section of this specification is not implied. Operation beyond the maximum operating conditions for extended periods may affect product reliability.
THERMAL RESISTANCE
θJA is specified for the worst-case conditions, that is, a device soldered in a circuit board for surface-mount packages. The θ JA value in Table 3 assumes a 4-layer JEDEC standard board with zero airflow.
Table 3. Thermal Resistance1 Parameter θJA θJC θJB ΨJT Unit
40-Lead LFCSP 57.9 11.2 35.9 1.1 °C/W 1 4-layer JEDEC board (2S2P). Rev. D | Page 5 of 32 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE MAXIMUM POWER DISSIPATION ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TEST CIRCUITS THEORY OF OPERATION LOW NOISE AMPLIFIER (LNA) GAIN SETTING TECHNIQUE ACTIVE INPUT RESISTANCE MATCHING APPLICATIONS INFORMATION TYPICAL SETUP I/Q DEMODULATION FRONT END DIFFERENTIAL-TO-SINGLE-ENDED CONVERSION EVALUATION BOARD CONNECTION AND OPERATION Power Supply Input Termination Setting the Amplifier Gain Output SCHEMATIC OUTLINE DIMENSIONS ORDERING GUIDE NOTES NOTES NOTES
Data Sheet AD8432 ABSOLUTE MAXIMUM RATINGS MAXIMUM POWER DISSIPATION Table 2.
The maximum safe power dissipation for the AD8432 is limited
Parameter Rating
by the associated rise in junction temperature (T Voltage J) on the die. At approximately 150°C, which is the glass transition temperature, Supply Voltage 5.5 V the properties of the plastic change. Even temporarily exceeding Input Voltage 0 V to VPS this temperature limit may change the stresses that the package Power Dissipation 120 mW exerts on the die, permanently shifting the parametric performance Temperature of the amplifiers. Exceeding a temperature of 150°C for an Operating Temperature –40°C to +85°C extended period can cause changes in silicon devices, potentially Storage Temperature –65°C to +150°C resulting in a loss of functionality. Package Glass Transition Temperature (TG) 150°C Lead Temperature (Soldering, 60 sec) 300°C Stresses at or above those listed under Absolute Maximum
ESD CAUTION
Ratings may cause permanent damage to the product. This is a stress rating only; functional operation of the product at these or any other conditions above those indicated in the operational section of this specification is not implied. Operation beyond the maximum operating conditions for extended periods may affect product reliability.
THERMAL RESISTANCE
θJA is specified for the worst-case conditions, that is, a device soldered in a circuit board for surface-mount packages. The θ JA value in Table 3 assumes a 4-layer JEDEC standard board with zero airflow.
Table 3. Thermal Resistance1 Parameter θJA θJC θJB ΨJT Unit
40-Lead LFCSP 57.9 11.2 35.9 1.1 °C/W 1 4-layer JEDEC board (2S2P). Rev. D | Page 5 of 32 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE MAXIMUM POWER DISSIPATION ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TEST CIRCUITS THEORY OF OPERATION LOW NOISE AMPLIFIER (LNA) GAIN SETTING TECHNIQUE ACTIVE INPUT RESISTANCE MATCHING APPLICATIONS INFORMATION TYPICAL SETUP I/Q DEMODULATION FRONT END DIFFERENTIAL-TO-SINGLE-ENDED CONVERSION EVALUATION BOARD CONNECTION AND OPERATION Power Supply Input Termination Setting the Amplifier Gain Output SCHEMATIC OUTLINE DIMENSIONS ORDERING GUIDE NOTES NOTES NOTES