Datasheet HT68F001, HT68F0012 (Holtek) - 7

制造商Holtek
描述Cost-Effective Flash MCU
页数 / 页56 / 7 — HT68F001/HT68F0012. Cost-Effective Flash MCU. Pin Description. Pin Name. …
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HT68F001/HT68F0012. Cost-Effective Flash MCU. Pin Description. Pin Name. Function. OPT. I/T. O/T. Description

HT68F001/HT68F0012 Cost-Effective Flash MCU Pin Description Pin Name Function OPT I/T O/T Description

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HT68F001/HT68F0012 HT68F001/HT68F0012 Cost-Effective Flash MCU Cost-Effective Flash MCU Pin Description
The function of each pin is listed in the following table, however the details behind how each pin is configured is contained in other sections of the datasheet.
Pin Name Function OPT I/T O/T Description
P�0 P�PU P�0/ICPD� P�WU ST CMOS Gene�a� �u��ose I/O. Registe� enab�ed �u��-high and wake-u�. ICPD� — ST CMOS ICP �dd�ess/Data P�1 P�1 P�PU P�WU ST CMOS Gene�a� �u��ose I/O. Registe� enab�ed �u��-high and wake-u�. P�2 P�PU P�2/ICPCK P�WU ST CMOS Gene�a� �u��ose I/O. Registe� enab�ed �u��-high and wake-u�. ICPCK — ST — ICP C�ock �in P�3 P�PU P�3/TC P�WU ST CMOS Gene�a� �u��ose I/O. Registe� enab�ed �u��-high and wake-u�. TC — ST — Time�/Event Counte� exte�na� c�ock in�ut P�4 P�4 P�PU P�WU ST CMOS Gene�a� �u��ose I/O. Registe� enab�ed �u��-high and wake-u�. P�5 P�5 P�PU P�WU ST CMOS Gene�a� �u��ose I/O. Registe� enab�ed �u��-high and wake-u�. VDD VDD — PWR — Powe� Su���y VSS VSS — PWR — G�ound
The following pins are only for the HT68V001/0012
NC NC — — — No connection OCDSD� OCDSD� — ST CMOS OCDS �dd�ess/Data� fo� EV chi� on�y OCDSCK OCDSCK — ST — OCDS C�ock �in� fo� EV chi� on�y Legend: I/T: Input type; O/T: Output type; OPT: Optional by register option; PWR: Power; ST: Schmitt Trigger input; CMOS: CMOS output.
Absolute Maximum Ratings
Supply Voltage ...VSS-0.3V to VSS+6.0V Input Voltage ...VSS-0.3V to VDD+0.3V Storage Temperature ... -50°C to 125°C Operating Temperature ... -40°C to 85°C IOL Total ... 80mA IOH Total .. -80mA Total Power Dissipation ... 500mW Note: These are stress ratings only. Stresses exceeding the range specified under “Absolute Maximum Ratings” may cause substantial damage to the device. Functional operation of this device at other conditions beyond those listed in the specification is not implied and prolonged exposure to extreme conditions may affect device reliability. Rev. 1.20 6 ���i� 1�� 201� Rev. 1.20 � ���i� 1�� 201� Document Outline Features CPU Features Peripheral Features General Description Selection Table Block Diagram Pin Assignment Pin Description Absolute Maximum Ratings D.C. Characteristics Operating Voltage Characteristics Operating Current Characteristics Standby Current Characteristics A.C. Characteristics Low Speed Internal Oscillator Characteristics (LIRC) – HT68F001 Low Speed Internal Oscillator Characteristics (IRC) – HT68F0012 System Start Up Time Characteristics Input/Output Characteristics Power on Reset Characteristics System Architecture Clocking and Pipelining Program Counter Stack Arithmetic and Logic Unit – ALU Flash Program Memory Structure Special Vectors Look-up Table Table Program Example In Circuit Programming – ICP On-Chip Debug Support – OCDS Data Memory Structure General Purpose Data Memory Special Purpose Data Memory Special Function Register Description Indirect Addressing Registers – IAR0 Memory Pointers – MP0 Accumulator – ACC Program Counter Low Register – PCL Look-up Table Registers – TBLP Status Register – STATUS Oscillators Oscillator Overview System Clock Configurations Internal 32kHz Oscillator – LIRC Internal 512kHz Oscillator – IRC Operating Modes and System Clocks System Clocks System Operation Modes Standby Current Considerations Wake-up Watchdog Timer Watchdog Timer Clock Source Watchdog Timer Control Register Watchdog Timer Operation Reset and Initialisation Reset Functions Reset Initial Conditions Input/Output Ports Pull-high Resistors Port A Wake-up I/O Port Control Registers I/O Pin Structures Programming Considerations Timer/Event Counter Timer/Event Counter Registers – TMR, TMRC Timer Mode Event Counter Mode Pulse Width Capture Mode Interrupts Interrupt Registers Interrupt Operation Time Base Interrupt Interrupt Wake-up Function Programming Considerations Application Circuits Instruction Set Introduction Instruction Timing Moving and Transferring Data Arithmetic Operations Logical and Rotate Operation Branches and Control Transfer Bit Operations Table Read Operations Other Operations Instruction Set Summary Table Conventions Instruction Definition Package Information 8-pin SOP (150mil) Outline Dimensions