Datasheet HT45F5Q-3 (Holtek) - 9

HT45F5Q-3 HT45F5Q-3 Battery Charger Flash MCU Battery Charger Flash MCU
PB1/AN1/VREF 1 28 PB2/AN2/STPI VSS 2 27 PB3/AN3 VDD 3 26 PC6/SCOM3 PA5/OPA0P/CTPB 4 25 PC5/SCOM2 PA6/OPA1P/STPB 5 24 PB4/AN4 PB0/AN0 6 23 PB5/AN5 OPA1N 7 22 PB6/AN6/INT1 OPAE 8 21 PB7/AN7 OPA0N 9 20 PC4/SCOM1/SCS PA1/OPA2P 10 19 PC3/SCOM0/SCK/SCL PA0/OCDSDA/ICPDA 11 18 PC0/AN8/SCS PA2/OCDSCK/ICPCK 12 17 PC1/AN9/SCK/SCL PA3/CTP/CTCK/INT0/SDO/TX 13 16 PC2/SDI/SDA/RX PA4/STP/STCK/SDI/SDA/RX 14 15 PA7/SDO/TX
HT45F5Q-3/HT45V5Q-3 28 SSOP-A
Note: 1. If the pin-shared pin functions have multiple outputs simultaneously, the desired pin-shared function is determined by the corresponding software control bits. 2. The OCDSDA and OCDSCK pins are supplied for the OCDS dedicated pins and as such only available for the HT45V5Q-3 device which is the OCDS EV chip for the HT45F5Q-3 device. 3. For the less pin count package type there will be unbounded pins which should be properly configured to avoid unwanted power consumption resulting from floating input conditions. Refer to the “Standby Current Considerations” and “Input/Output Ports” sections.
Pin Description
The function of each pin is listed in the following table, however the details behind how each pin is configured is contained in other sections of the datasheet. As the Pin Description table shows the situation for the package with the most pins, not all pins in the table will be available on smaller package sizes.
Pin Name Function OPT I/T O/T Description
PA0 PAPU PAWU ST CMOS General purpose I/O. Register enabled pull-up and wake-up PA0/OCDSDA/ICPDA OCDSDA — ST CMOS OCDS address/data, for EV chip only ICPDA — ST CMOS ICP address/data PAPU PA1 PAWU ST CMOS General purpose I/O. Register enabled pull-up PA1/OPA2P PAS0 and wake-up OPA2P PAS0 AN — Operational amplifier 2 positive input PA2 PAPU PAWU ST CMOS General purpose I/O. Register enabled pull-up and wake-up PA2/OCDSCK/ICPCK OCDSCK — ST — OCDS clock, for EV chip only ICPCK — ST — ICP clock PAPU PA3 PAWU ST CMOS General purpose I/O. Register enabled pull-up PAS0 and wake-up CTP PAS0 — CMOS CTM output CTCK PAS0 ST — CTM clock input PA3/CTP/CTCK/INT0/SDO/TX PAS0 INT0 INTEG ST — External interrupt 0 input INTC0 SDO PAS0 — CMOS SPI serial data output TX PAS0 — CMOS UART TX serial data output Rev. 1.00 8 July 31, 2019 Rev. 1.00 9 July 31, 2019 Document Outline Features CPU Features Peripheral Features General Description Block Diagram Pin Assignment Pin Description Absolute Maximum Ratings D.C. Characteristics Operating Voltage Characteristics Operating Current Characteristics Standby Current Characteristics A.C. Characteristics High Speed Internal Oscillator – HIRC – Frequency Accuracy Low Speed Internal Oscillator Characteristics – LIRC Operating Frequency Characteristic Curves System Start Up Time Characteristics Input/Output Characteristics Memory Characteristics LVR Electrical Characteristics A/D Converter Electrical Characteristics D/A Converter Electrical Characteristics Operational Amplifier Electrical Characteristics Software Controlled LCD Driver Electrical Characteristics Power-on Reset Characteristics System Architecture Clocking and Pipelining Program Counter Stack Arithmetic and Logic Unit – ALU Flash Program Memory Structure Special Vectors Look-up Table Table Program Example In Circuit Programming – ICP On-Chip Debug Support – OCDS Data Memory Structure General Purpose Data Memory Special Purpose Data Memory Special Function Register Description Indirect Addressing Registers – IAR0, IAR1 Memory Pointers – MP0, MP1 Bank Pointer – BP Accumulator – ACC Program Counter Low Register – PCL Look-up Table Registers – TBLP, TBHP, TBLH Status Register – STATUS Emulated EEPROM Data Memory Emulated EEPROM Data Memory Structure Emulated EEPROM Registers Erasing the Emulated EEPROM Writing Data to the Emulated EEPROM Reading Data from the Emulated EEPROM Programming Considerations Oscillators Oscillator Overview System Clock Configurations Internal High Speed RC Oscillator – HIRC Internal 32kHz Oscillator – LIRC Operating Modes and System Clocks System Clocks System Operation Modes Control Registers Operating Mode Switching Standby Current Considerations Wake-up Watchdog Timer Watchdog Timer Clock Source Watchdog Timer Control Register Watchdog Timer Operation Reset and Initialisation Reset Functions Reset Initial Conditions Input/Output Ports Pull-high Resistors Port A Wake-up I/O Port Control Registers Pin-shared Functions I/O Pin Structures READ PORT Function Programming Considerations Timer Modules – TM Introduction TM Operation TM Clock Source TM Interrupts TM External Pins Programming Considerations Compact Type TM – CTM Compact Type TM Operation Compact Type TM Register Description Compact Type TM Operation Modes Standard Type TM – STM Standard TM Operation Standard Type TM Register Description Standard Type TM Operation Modes Analog to Digital Converter A/D Converter Overview A/D Converter Register Description A/D Converter Data Registers – SADOL, SADOH A/D Converter Reference Voltage A/D Converter Input Signal A/D Converter Operation Conversion Rate and Timing Diagram Summary of A/D Conversion Steps Programming Considerations A/D Conversion Function A/D Conversion Programming Examples Battery Charge Module Battery Charge Module Registers Digital to Analog Converter Operational Amplifiers Universal Serial Interface Module – USIM SPI Interface I2C Interface UART Interface Software Controlled LCD Driver LCD Operation LCD Bias Current Control Cyclic Redundancy Check – CRC CRC Registers CRC Operation Interrupts Interrupt Registers Interrupt Operation External Interrupts Time Base Interrupts Multi-function Interrupts TM Interrupts A/D Converter Interrupt USIM Interrupt Interrupt Wake-up Function Programming Considerations Application Descriptions Introduction Functional Description Hardware Circuit Instruction Set Introduction Instruction Timing Moving and Transferring Data Arithmetic Operations Logical and Rotate Operation Branches and Control Transfer Bit Operations Table Read Operations Other Operations Instruction Set Summary Table Conventions Instruction Definition Package Information 24-pin SSOP (150mil) Outline Dimensions 28-pin SSOP (150mil) Outline Dimensions