Datasheet LT8331 (Analog Devices) - 6

LT8331
PIN FUNCTIONS EN/UVLO (Pin 1):
Shutdown and Undervoltage Detect Pin. between the output and the exposed pad GND copper The LT8331 is shut down when this pin is low and active (near Pin 9). FBX reduces the switching frequency during when this pin is high. Below an accurate 1.6V threshold, start-up and fault conditions when FBX is close to 0V. the part enters undervoltage lockout and stops switching.
RT (Pin 10):
A resistor from this pin to the exposed pad This allows an undervoltage lockout (UVLO) threshold to GND copper (near Pin 9) programs switching frequency. be programmed for system input voltage by resistively dividing down system input voltage to the EN/UVLO pin.
SS (Pin 11):
Soft-Start Pin. Connect a capacitor from this A 140mV pin hysteresis ensures part switching resumes pin to GND copper (near Pin 9) to control the ramp rate of when the pin exceeds 1.74V. EN/UVLO pin voltage below inductor current during converter start-up. SS pin charg- 0.2V reduces VIN current below 1µA. If shutdown and ing current is 2μA. An internal 250Ω MOSFET discharges UVLO features are not required, the pin can be tied directly this pin during shutdown or fault conditions. to system input.
SYNC/MODE (Pin 12):
This pin allows three selectable
VIN (Pin 3):
Input Supply. This pin must be locally modes for optimization of performance. bypassed. Be sure to place the positive terminal of the 1. GND: For Burst Mode operation (low I input capacitor as close as possible to the V Q and low output IN pin, and voltage ripple at light loads). the negative terminal as close as possible to the exposed pad PGND copper (near Pin 1). 2. External Clock : For synchronized switching frequency.
INTV
3. INTV
CC (Pin 5):
Regulated 3.2V Supply for Internal Loads. CC: For pulse-skipping mode (at light load or low The INTV duty cycle). CC pin must be bypassed with a minimum 1µF low ESR ceramic capacitor to GND. No additional com-
SW1, SW2 (Pins 14, 16):
Outputs of the Internal Power ponents or loading is allowed on this pin. INTVCC draws Switch. Minimize the metal trace area connected to these power from the BIAS pin if 4.4V ≤ BIAS ≤ VIN – 0.4V, pins to reduce EMI. otherwise INTVCC is powered by the VIN pin.
PGND,GND (Pin 17):
Power Ground and Signal Ground
NC (Pins 6, 8):
No Internal Connection. Leave these pins for the IC. The package has an exposed pad (Pin 17) open. underneath the IC which is the best path for heat out of
BIAS (Pin 7):
Second Input Supply for Powering INTV the package. Pin 17 should be soldered to a continuous CC. Removes the majority of INTV copper ground plane under the device to reduce die tem- CC current from the VIN pin to improve efficiency when 4.4V ≤ BIAS ≤ V perature and increase the power capability of the LT8331. IN – 0.4V. If unused, tie the pin to GND copper. Connect power ground components to the exposed pad copper exiting near Pins 1, 14 and 16. Connect signal
FBX (Pin 9):
Voltage Regulation Feedback Pin for Positive ground components to the exposed pad copper exiting or Negative Outputs. Connect this pin to a resistor divider near Pins 8 and 9. Rev. B 6 For more information www.analog.com Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Order Information Electrical Characteristics Pin Configuration Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Operation Applications Information Typical Applications Package Description Revision History Typical Application Related Parts