Datasheet ADP5074 (Analog Devices)

2.4 A, DC-to-DC Inverting Regulator Data Sheet ADP5074 FEATURES TYPICAL APPLICATION CIRCUIT Wide input voltage range: 2.85 V to 15 V CVREF Adjustable negative output to VIN − 39 V AVIN VREF Integrated 2.4 A main switch VIN PVIN R 1.2 MHz/2.4 MHz switching frequency with optional external FB CIN frequency synchronization from 1.0 MHz to 2.6 MHz ADP5074 FB RFT Resistor programmable soft start timer ON D1 OFF EN Slew rate control for lower system noise SW V C OUT VREG Precision enable control C VREG OUT Power-good output L1 SS UVLO, OCP, OVP, and TSD protection 3 mm × 3 mm, 16-lead LFCSP PWRGD PWRGD SLEW −40°C to +125°C junction temperature COMP SYNC/FREQ Supported by the ADIsimPower t ool set R C C C GND
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APPLICATIONS
12818-
Bipolar amplifiers, ADCs, digital-to-analog converters
Figure 1.
(DACs), and multiplexers High speed converters Radio frequency (RF) power amplifier (PA) bias Optical modules GENERAL DESCRIPTION
The ADP5074 is a high performance dc-to-dc inverting regulator Other key safety features in the ADP5074 include overcurrent used to generate negative supply rails. protection (OCP), overvoltage protection (OVP), thermal The input voltage range of 2.85 V to 15 V supports a wide variety of shutdown (TSD), and input undervoltage lockout (UVLO). applications. The integrated main switch enables the generation of The ADP5074 is available in a 16-lead LFCSP and is rated for a an adjustable negative output voltage down to 39 V below the −40°C to +125°C operating junction temperature range. input voltage.
Table 1. Related Devices
The ADP5074 operates at a pin selected 1.2 MHz/2.4 MHz
Boost Inverter
switching frequency. The ADP5074 can synchronize with an
Device Switch (A) Switch (A) Package
external oscil ator from 1.0 MHz to 2.6 MHz to ease noise ADP5070 1.0 0.6 20-lead LFCSP (4 mm × filtering in sensitive applications. The regulator implements 4 mm) and TSSOP programmable slew rate control circuitry for the MOSFET ADP5071 2.0 1.2 20-lead LFCSP (4 mm × driver stage to reduce electromagnetic interference (EMI). 4 mm) and TSSOP The ADP5074 includes a fixed internal or resistor programmable ADP5073 Not 1.2 16-lead LFCSP (3 mm × applicable 3 mm) soft start timer to prevent inrush current at power-up. During ADP5074 Not 2.4 16-lead LFCSP (3 mm × shutdown, the regulator completely disconnects the load from the applicable 3 mm) input supply to provide a true shutdown. A power good pin is ADP5075 Not 0.8 12-ball WLCSP available to indicate the output is stable. applicable (1.61 mm × 2.18 mm)
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Document Outline FEATURES APPLICATIONS TYPICAL APPLICATION CIRCUIT GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION PWM MODE SKIP MODE UNDERVOLTAGE LOCKOUT (UVLO) OSCILLATOR AND SYNCHRONIZATION INTERNAL REGULATORS PRECISION ENABLING SOFT START SLEW RATE CONTROL CURRENT-LIMIT PROTECTION OVERVOLTAGE PROTECTION POWER GOOD APPLICATIONS INFORMATION ADIsimPOWER DESIGN TOOL COMPONENT SELECTION Feedback Resistors Output Capacitor Input Capacitor VREG Capacitor VREF Capacitor Soft Start Resistor Diodes Inductor Selection Loop Compensation COMMON APPLICATIONS LAYOUT CONSIDERATIONS OUTLINE DIMENSIONS ORDERING GUIDE