Datasheet LTC4120, LTC4120-4.2 (Analog Devices) - 5

link to page 2 LTC4120/LTC4120-4.2
ELECTRICAL CHARACTERISTICS The
l
denotes the specifications which apply over the specified operating junction temperature range, otherwise specifications are at TA = 25°C (Note 2). VIN = VRUN = 15V, VCHGSNS = VBAT = 4V, RPROG = 3.01k, VFB = 2.29V (LTC4120), VBATSNS = 4V (LTC4120-4.2). Current into a pin is positive out of the pin is negative. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS RUN
VEN Enable threshold VRUN Rising l 2.35 2.45 2.55 V Hysteresis VRUN Falling 200 mV Run Pin Input Current VRUN = 40V 0.01 0.1 µA VSD Shutdown Threshold (Note 3) VRUN Falling l 0.4 1.2 V Hysteresis 220 mV
FREQ
FREQ Pin Input Low l 0.4 V FREQ Pin Input High VINTVCC-VFREQ l 0.6 V FREQ Pin Input Current 0V < VFREQ < VINTVCC ±1 µA
Dynamic Harmonization Control
VIN(DHC) Input Regulation Voltage 14 V DHC Pin Current VDHC = 1V, VIN < VIN(DHC) 330 mARMS
Note 1:
Stresses beyond those listed under Absolute Maximum Ratings
Note 4:
The internal supply INTVCC should only be used for the NTC may cause permanent damage to the device. Exposure to any Absolute divider, it should not be used for any other loads. Maximum Rating condition for extended periods may affect device
Note 5:
The FB pin is measured with a resistance of 588k in series with reliability and lifetime. the pin.
Note 2:
The LTC4120 is tested under pulsed load conditions such that
Note 6:
hC/10 is expressed as a fraction of measured full charge current as TJ ≈ TA. The LTC4120E is guaranteed to meet performance specifications measured at the PROG pin voltage when the CHRG pin de-asserts. for junction temperatures from 0°C to 85°C. Specifications over the
Note 7:
In an application circuit with an inductor connected from SW –40°C to 125°C operating junction temperature range are assured by to CHGSNS, the total battery leakage current when disabled is the sum design, characterization and correlation with statistical process controls. of I The LTC4120I is guaranteed over the full –40°C to 125°C operating BAT, IFBG(LEAK) and ISW (LTC4120), or IBATSNS and IBAT and ISW (LTC4120-4.2). junction temperature range. Note that the maximum ambient temperature consistent with these specifications is determined by specific operating
Note 8:
When no supply is present at IN, the SW powers IN through conditions in conjunction with board layout, the rated package thermal the body diode of the topside switch. This may cause additional SW pin impedance, and other environmental factors. current depending on the load present at IN.
Note 3:
Standby mode occurs when the LTC4120 stops switching due
Note 9:
Guaranteed by design and/or correlation to static test. to an NTC fault condition, or when the charge current has dropped low enough to enter Burst Mode operation. Disabled mode occurs when VRUN is between VSD and VEN. Shutdown mode occurs when VRUN is below VSD or when the differential undervoltage lockout is engaged. SLEEP mode occurs after a timeout while the battery voltage remains above the VRCHG or VRCHG_42 threshold. Rev. G For more information www.analog.com 5 Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Test Circuit Operation Applications Information Package Description Revision History Typical Application Related Parts