Datasheet LT7101 (Analog Devices) - 4
| 制造商 | Analog Devices |
| 描述 | 105V, 1A Low EMI Synchronous Step-Down Regulator with Fast Current Programming |
| 页数 / 页 | 38 / 4 — ELECTRICAL CHARACTERISTICS. The. denotes the specifications which apply … |
| 文件格式/大小 | PDF / 3.2 Mb |
| 文件语言 | 英语 |
ELECTRICAL CHARACTERISTICS. The. denotes the specifications which apply over the specified operating
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link to page 2 link to page 18 link to page 18 LT7101
ELECTRICAL CHARACTERISTICS The
l
denotes the specifications which apply over the specified operating junction temperature range, otherwise specifications are at TA = 25°C. (Note 2) VIN = 12V unless otherwise noted. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
VOV(R) OVLO Pin Rising Threshold VOVLO Rising l 1.16 1.21 1.26 V OVLO Pin Hysteresis 65 mV OVLO Pin Leakage Current OVLO = 1.5V –10 0 10 nA
Bias Regulators and Housekeeping
INTVCC Undervoltage Lockout INTVCC Rising 3.00 V INTVCC Falling 2.80 V VEXTVCC EXTVCC Switchover Voltage EXTVCC Rising l 3.03 3.10 3.17 V EXTVCC Falling l 2.95 3.00 3.07 V Regulated INTVCC Voltage from VIN 3.37 3.50 3.63 V Regulated INTVCC Voltage from EXTVCC 3.37 3.50 3.63 V
Oscillator and Phase-Locked Loop
Programmable Frequency Accuracy RFREQ = 12.5k (200kHz) to 57.5k (2MHz) l –15 15 % PLLIN/MODE = 0V fLOW Low Preset Frequency VFREQ = 0V; l 270 300 330 kHz PLLIN/MODE = 0V fHIGH High Preset Frequency VFREQ = INTVCC; l 0.9 1.0 1.1 MHz PLLIN/MODE = 0V Synchronizable Frequency PLLIN/MODE = External Clock l 200 2000 kHz PLLIN/MODE Input High Level for Clocking PLLIN/MODE = External Clock l 2.0 V PLLIN/MODE Input Low Level for Clocking PLLIN/MODE = External Clock l 0.8 V
PGOOD Output
PGOOD Voltage Low IPGOOD = 1mA 0.3 0.5 V PGOOD Leakage Current VPGOOD = 12V –1 1 µA PGOOD Trip Level VFB with Respect to Set Regulated Voltage VFB Ramping Positive 7 10 13 % Hysteresis 2.5 % VFB Ramping Negative –13 –10 –7 % Hysteresis 2.5 % TPG Delay for Reporting a Fault 24 µs
Note 1:
Stresses beyond those listed under Absolute Maximum Ratings
Note 4:
This IC includes overtemperature protection that is intended to may cause permanent damage to the device. Exposure to any Absolute protect the device during momentary overload conditions. The maximum Maximum Rating condition for extended periods may affect device rated junction temperature will be exceeded when this protection is active. reliability and lifetime. Continuous operation above the specified absolute maximum operating
Note 2:
The LT7101E is guaranteed to meet specifications from 0°C to junction temperature may impair device reliability or permanently damage 85°C with specifications over the –40°C to 125°C operating junction the device. The overtemperature protection level is not production tested. temperature range assured by design, characterization and correlation with
Note 5:
The LT7101 is tested in a feedback loop that servos VFB to a statistical process controls. The LT7101I is guaranteed over the –40°C to voltage near the internal reference voltage to obtain the specified ITH 125°C operating junction temperature range, the LT7101H is guaranteed voltage. over the –40°C to 150°C operating junction temperature range, and the
Note 6:
The Average Output Current Limit, the Top Switch Peak Current LT7101MP is tested and guaranteed over the –55°C to 150°C operating Limit and the Current Monitor Output Voltage are measured in a test circuit junction temperature range. High junction temperatures degrade operating lifetimes; operating lifetime is derated for junction temperatures greater that simulates operation in a typical application. than 125°C. Note that the maximum ambient temperature consistent with
Note 7:
The minimum controllable on-time is measured in a test mode. these specifications is determined by specific operating conditions in (See Minimum ON-Time Considerations in the Applications Information conjunction with board layout, the rated package thermal impedance and section.) other environmental factors.
Note 8:
Dynamic supply current is higher due to the internal gate charge
Note 3:
TJ is calculated from the ambient temperature TA and power being delivered at the switching frequency. dissipation PD according to the following formula:
Note 9:
See Operating at VOUT > 6V in Applications Information section for TJ
=
TA
+ (
PD
•
qJA
°
C
/
W
)
details about additional design constraints that may apply. Rev. 0 4 For more information www.analog.com Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Order Information Pin Configuration Electrical Characteristics Typical Performance Characteristics Pin Functions Functional Diagram Operation Applications Information Typical Applications Package Description Typical Application Related Parts
ELECTRICAL CHARACTERISTICS The
l
denotes the specifications which apply over the specified operating junction temperature range, otherwise specifications are at TA = 25°C. (Note 2) VIN = 12V unless otherwise noted. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
VOV(R) OVLO Pin Rising Threshold VOVLO Rising l 1.16 1.21 1.26 V OVLO Pin Hysteresis 65 mV OVLO Pin Leakage Current OVLO = 1.5V –10 0 10 nA
Bias Regulators and Housekeeping
INTVCC Undervoltage Lockout INTVCC Rising 3.00 V INTVCC Falling 2.80 V VEXTVCC EXTVCC Switchover Voltage EXTVCC Rising l 3.03 3.10 3.17 V EXTVCC Falling l 2.95 3.00 3.07 V Regulated INTVCC Voltage from VIN 3.37 3.50 3.63 V Regulated INTVCC Voltage from EXTVCC 3.37 3.50 3.63 V
Oscillator and Phase-Locked Loop
Programmable Frequency Accuracy RFREQ = 12.5k (200kHz) to 57.5k (2MHz) l –15 15 % PLLIN/MODE = 0V fLOW Low Preset Frequency VFREQ = 0V; l 270 300 330 kHz PLLIN/MODE = 0V fHIGH High Preset Frequency VFREQ = INTVCC; l 0.9 1.0 1.1 MHz PLLIN/MODE = 0V Synchronizable Frequency PLLIN/MODE = External Clock l 200 2000 kHz PLLIN/MODE Input High Level for Clocking PLLIN/MODE = External Clock l 2.0 V PLLIN/MODE Input Low Level for Clocking PLLIN/MODE = External Clock l 0.8 V
PGOOD Output
PGOOD Voltage Low IPGOOD = 1mA 0.3 0.5 V PGOOD Leakage Current VPGOOD = 12V –1 1 µA PGOOD Trip Level VFB with Respect to Set Regulated Voltage VFB Ramping Positive 7 10 13 % Hysteresis 2.5 % VFB Ramping Negative –13 –10 –7 % Hysteresis 2.5 % TPG Delay for Reporting a Fault 24 µs
Note 1:
Stresses beyond those listed under Absolute Maximum Ratings
Note 4:
This IC includes overtemperature protection that is intended to may cause permanent damage to the device. Exposure to any Absolute protect the device during momentary overload conditions. The maximum Maximum Rating condition for extended periods may affect device rated junction temperature will be exceeded when this protection is active. reliability and lifetime. Continuous operation above the specified absolute maximum operating
Note 2:
The LT7101E is guaranteed to meet specifications from 0°C to junction temperature may impair device reliability or permanently damage 85°C with specifications over the –40°C to 125°C operating junction the device. The overtemperature protection level is not production tested. temperature range assured by design, characterization and correlation with
Note 5:
The LT7101 is tested in a feedback loop that servos VFB to a statistical process controls. The LT7101I is guaranteed over the –40°C to voltage near the internal reference voltage to obtain the specified ITH 125°C operating junction temperature range, the LT7101H is guaranteed voltage. over the –40°C to 150°C operating junction temperature range, and the
Note 6:
The Average Output Current Limit, the Top Switch Peak Current LT7101MP is tested and guaranteed over the –55°C to 150°C operating Limit and the Current Monitor Output Voltage are measured in a test circuit junction temperature range. High junction temperatures degrade operating lifetimes; operating lifetime is derated for junction temperatures greater that simulates operation in a typical application. than 125°C. Note that the maximum ambient temperature consistent with
Note 7:
The minimum controllable on-time is measured in a test mode. these specifications is determined by specific operating conditions in (See Minimum ON-Time Considerations in the Applications Information conjunction with board layout, the rated package thermal impedance and section.) other environmental factors.
Note 8:
Dynamic supply current is higher due to the internal gate charge
Note 3:
TJ is calculated from the ambient temperature TA and power being delivered at the switching frequency. dissipation PD according to the following formula:
Note 9:
See Operating at VOUT > 6V in Applications Information section for TJ
=
TA
+ (
PD
•
qJA
°
C
/
W
)
details about additional design constraints that may apply. Rev. 0 4 For more information www.analog.com Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Order Information Pin Configuration Electrical Characteristics Typical Performance Characteristics Pin Functions Functional Diagram Operation Applications Information Typical Applications Package Description Typical Application Related Parts