Datasheet LTC7103 (Analog Devices) - 10
| 制造商 | Analog Devices |
| 描述 | 105V, 2.3A Low EMI Synchronous Step-Down Regulator |
| 页数 / 页 | 40 / 10 — PIN FUNCTIONS IMON (Pin 17):. INTV. CC (Pin 21):. VPRG1, VPRG2 (Pins … |
| 修订版 | A |
| 文件格式/大小 | PDF / 3.0 Mb |
| 文件语言 | 英语 |
PIN FUNCTIONS IMON (Pin 17):. INTV. CC (Pin 21):. VPRG1, VPRG2 (Pins 18,19):. SW (Pins 24, 25, 26):. BOOST (Pin 27):
文件文字版本
link to page 18 link to page 18 LTC7103
PIN FUNCTIONS IMON (Pin 17):
Average Output Current Monitor. This See INTVCC Regulations in the Applications Information pin generates a voltage between 0.4V and 1.3V that cor- section. responds to an average output current between 0A and
INTV
2.5A.
CC (Pin 21):
Output of the Internal LDO regulator. The driver and control circuits are powered from this voltage
VPRG1, VPRG2 (Pins 18,19):
Output Voltage Programming source. Must be decoupled to PGND with a 1µF to 4.7μF Pins. These pins set the regulator to adjustable output ceramic capacitor. mode or to fixed output mode. Floating both pins allows
SW (Pins 24, 25, 26):
SW Node connection from the the output to be programmed through the VFB pin using internal MOSFET power switches to the output inductor. external resistors, regulating VFB to the 1V reference. Tying one of these pins to SGND or INTVCC while the other
BOOST (Pin 27):
Bootstrapped Supply to the High Side is tied to SGND, INTVCC or floating programs the output Floating Gate Driver. Connect a 0.1µF ceramic capacitor to one of eight fixed output voltages. See Output Voltage between the BOOST and SW pins. Programming in the Applications Information section.
VIN (Pins 30, 31, 32):
Power Input Supply. This is the
EXTVCC (Pin 20):
External Power Input to an Internal LDO power input to the integrated high side MOSFET switch as that Generates INTVCC. This LDO supplies INTVCC power well as the input to the internal LDO that generates INTVCC from EXTVCC, bypassing the internal LDO powered from voltage. Decouple this pin with a capacitor to PGND. VIN whenever EXTVCC is between 3.1V and 40V. If EXTVCC
PGND/Exposed Pad (Pin 35, 36, 37):
Power Ground. is not used, the regulator timeout feature must be dis- Connect to power ground plane. The exposed pad must abled by tying a 75k resistor between SS and INTVCC. be connected to PCB ground for rated electrical and ther- mal performance. Rev. A 10 For more information www.analog.com Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Functional Diagram Operation Applications Information Package Description Revision History Typical Application Related Parts
PIN FUNCTIONS IMON (Pin 17):
Average Output Current Monitor. This See INTVCC Regulations in the Applications Information pin generates a voltage between 0.4V and 1.3V that cor- section. responds to an average output current between 0A and
INTV
2.5A.
CC (Pin 21):
Output of the Internal LDO regulator. The driver and control circuits are powered from this voltage
VPRG1, VPRG2 (Pins 18,19):
Output Voltage Programming source. Must be decoupled to PGND with a 1µF to 4.7μF Pins. These pins set the regulator to adjustable output ceramic capacitor. mode or to fixed output mode. Floating both pins allows
SW (Pins 24, 25, 26):
SW Node connection from the the output to be programmed through the VFB pin using internal MOSFET power switches to the output inductor. external resistors, regulating VFB to the 1V reference. Tying one of these pins to SGND or INTVCC while the other
BOOST (Pin 27):
Bootstrapped Supply to the High Side is tied to SGND, INTVCC or floating programs the output Floating Gate Driver. Connect a 0.1µF ceramic capacitor to one of eight fixed output voltages. See Output Voltage between the BOOST and SW pins. Programming in the Applications Information section.
VIN (Pins 30, 31, 32):
Power Input Supply. This is the
EXTVCC (Pin 20):
External Power Input to an Internal LDO power input to the integrated high side MOSFET switch as that Generates INTVCC. This LDO supplies INTVCC power well as the input to the internal LDO that generates INTVCC from EXTVCC, bypassing the internal LDO powered from voltage. Decouple this pin with a capacitor to PGND. VIN whenever EXTVCC is between 3.1V and 40V. If EXTVCC
PGND/Exposed Pad (Pin 35, 36, 37):
Power Ground. is not used, the regulator timeout feature must be dis- Connect to power ground plane. The exposed pad must abled by tying a 75k resistor between SS and INTVCC. be connected to PCB ground for rated electrical and ther- mal performance. Rev. A 10 For more information www.analog.com Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Functional Diagram Operation Applications Information Package Description Revision History Typical Application Related Parts