TMC2590 DATASHEET (V1.0 / 2019-FEB-22) 7 PinNumber TypeFunction LA2 7 on MOSFET. LB1 19 LB2 18 SRA 8 AI Sense resistor input for coil current measurement. Connect to upper SRB 17 side of sense resistor. SRAL 28 AI Sense resistor negative input for coil current measurement. For best SRBL 13 results, connect to lower side of sense resistor using Kelvin connection, or connect to GND plane near the respective sense resistor’s GND terminal. 5VOUT 9 Output of internal 5V linear regulator. This voltage is used to supply the low side drivers and internal analog circuitry. An external capacitor to GND close to the pin is required. Place the capacitor near to pin 9. 470nF ceramic are sufficient for most applications, a higher capacity up to 10µF improves performance with high gate charge MOSFETs. SDO 10 DO VIO Data output of SPI interface (Tristate) SDI (CFG3) 11 DI VIO Data input of SPI interface / Microstep resolution control input in standalone mode: 0: MRES=256 microsteps; 1: MRES=16 microsteps with interpolation SCK (CFG2) 12 DI VIO Serial clock input of SPI interface / Chopper hysteresis control input in standalone mode: 0: HEND=4, HSTRT=2; 1: HEND=4, HSTRT=6 CSN (CFG1) 14 DI VIO Chip select input of SPI interface / Current control input in standalone mode: 0: Current scale CS=15; 1: Current scale CS=31 ENN 15 DI VIO Enable not input for drivers. Switches off all MOSFETs. Tie low for normal operation. CLK 16 DI VIO Clock input for all internal operations. Tie low to use internal oscillator. Automatically switches to external clock, when the first high signal is recognized. VHS 24 High side supply voltage (motor supply voltage VS - 10V). Attach a ceramic capacitor between VHS and VS. Typ. 220nF to 1µF, 16V. VS 25 Motor supply voltage. Tie to positive supply voltage of MOSFET bridge. ST_ALONE 26 DI VIO Stand-alone mode selection. Tie to VCC_IO for non-SPI, stand-alone (pd) mode. Leave open for normal operation. Internal 10k pulldown resistor. SG_TST 27 DO VIO StallGuard2™ output. Signals motor stall (high active). Evaluate only when at sufficient velocity. VCC_IO 29 Input / output supply voltage VIO for all digital pins. Tie to digital logic supply voltage. Allows operation in 3.3V and 5V systems. DIR 30 DI VIO Direction input. Is sampled upon detection of a step to determine stepping direction. An internal glitch filter for 20ns is provided. STEP 31 DI VIO Step input. An internal glitch filter for 20ns is provided. TST_MODE 32 DI VIO Test mode input. Puts IC into test mode. Tie to GND for normal (pd) operation using a short wire to GND plane. Internal 166k pull down resistor for safety. No user functionality. www.trinamic.com