Datasheet CMX7146 (CML Microcircuits) - 8

BPSK Wireless Data Modulator CMX7146 Notes: 1. X1 can be a crystal or an external clock generator; this will depend on the application. The tracks between the crystal and the device pins should be as short as possible to achieve maximum stability and best start up performance. By default, 19.2 MHz external oscillator is assumed, other values could be used if the various internal clock dividers are set to appropriate values. 2. If any of the Channel inputs are not required, the respective pin should be connected to AVss. 3. A single 10µF electrolytic capacitor may be fitted in place of C4 and C24, providing the two VDEC pins are connected together on the pcb with an adequate width power supply trace.  2019 CML Microsystems Plc Page 8 D/7146/1 Document Outline Datasheet Front Page 1 Brief Description 1.1 History 2 Signal List 3 External Components 4 PCB Layout Guidelines and Power Supply Decoupling 5 General Description 5.1 CMX7146 Features 6 Detailed Descriptions 6.1 Xtal Frequency 6.2 Host Interface 6.2.1 C-BUS Operation 6.3 Function Image Loading 6.3.1 FI Loading from Host Controller 6.3.2 FI Loading from Flash/EEPROM 6.4 Device Control 6.4.1 Device Configuration (using the Programming Register) 6.4.2 Device Configuration (using dedicated registers) 6.4.3 Interrupt Operation 6.4.4 Signal Routing 6.4.5 Loading Transmit Data 6.4.6 The Transmit Sequence 6.4.7 Other Modem Modes 6.4.8 Data Transfer 6.4.9 Raw Data Transfer 6.4.10 Pre-loading transmit data 6.4.11 Auxiliary clock rates 6.4.12 Auxiliary data 6.4.13 GPIO Pin Operation 6.4.14 Auxiliary ADC Operation 6.4.15 Auxiliary DAC / RAMDAC Operation 6.5 Digital System Clock Generators 6.5.1 System Clock Operation 6.6 Signal Level Optimisation 6.7 C-BUS Register Summary 7 CMX7146 FI-1.x Features 7.1 Modulation 7.2 Radio Interface 7.3 Transmit Performance 8 Performance Specification 8.1 Electrical Performance 8.1.1 Absolute Maximum Ratings 8.1.2 Operating Limits 8.1.3 Operating Characteristics 8.1.4 Parametric Performance 8.2 C-BUS Timing 8.3 Packaging END OF DOCUMENT