Datasheet ADL5315 (Analog Devices) - 5
| 制造商 | Analog Devices |
| 描述 | Precision Wide-range (3 nA - 3 mA) High-Side Current Mirror |
| 页数 / 页 | 17 / 5 — Data Sheet. ADL5315. PIN CONFIGURATION AND FUNCTION DESCRIPTIONS. INPT 1. … |
| 修订版 | A |
| 文件格式/大小 | PDF / 472 Kb |
| 文件语言 | 英语 |
Data Sheet. ADL5315. PIN CONFIGURATION AND FUNCTION DESCRIPTIONS. INPT 1. 8 IOUT. VSET 2. 7 NC. TOP VIEW. SREF 3. 6 VPOS. (Not to Scale)
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Data Sheet ADL5315 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS INPT 1 8 IOUT VSET 2 7 NC ADL5315 TOP VIEW SREF 3 6 VPOS (Not to Scale) COMM 4 5 RLIM NOTES 1. NC = NO CONNECT. 2. EXPOSED PAD. INTERNALLY CONNECTED TO COMM,
002
SOLDER TO GROUND.
05694- Figure 2. 8-Lead LFCSP
Table 3. Pin Function Descriptions Pin No. Mnemonic Description
1 INPT Input Current. Pin sources current only. 2 VSET Sets Voltage at INPT (Gain = 1). Range 0 V to VPOS − 1.0 V for VPOS < 6.5 V. For VPOS ≥ 6.5 V range, VPOS − 6.5 V to VPOS − 1 V. Optional shielding of INPT trace. 3 SREF Reference Voltage for VSET. Internally generated at VPOS − 1.0 V through 20 kΩ. Can be shorted to VSET for standard mirror operation. 4 COMM Analog Ground. 5 RLIM External Resistor to VPOS. Sets current limit at INPT from 1 mA to 16 mA. ILIM = 48 V/(RLIM + 3 kΩ). 6 VPOS Positive Supply (2.7 V to 8.0 V). 7 N/C Optional Shielding of IOUT Trace. No connection to die. 8 IOUT Output Current. Mirrors current at INPT with a gain of 1.0. Sources current only. PADDLE Exposed Pad. Internally connected to COMM, solder to ground. Rev. A | Page 5 of 17 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION BIAS CONTROL INTERFACE NOISE PERFORMANCE MIRROR RESPONSE TIME INPUT CURRENT LIMITING APPLICATIONS AVERAGE POWER MONITORING TRANSLINEAR LOG AMP INTERFACING EXTENDED OPERATING RANGE USING RLIM AS A SECONDARY MONITOR CHARACTERIZATION METHODS EVALUATION BOARD OUTLINE DIMENSIONS ORDERING GUIDE
002
SOLDER TO GROUND.
05694- Figure 2. 8-Lead LFCSP
Table 3. Pin Function Descriptions Pin No. Mnemonic Description
1 INPT Input Current. Pin sources current only. 2 VSET Sets Voltage at INPT (Gain = 1). Range 0 V to VPOS − 1.0 V for VPOS < 6.5 V. For VPOS ≥ 6.5 V range, VPOS − 6.5 V to VPOS − 1 V. Optional shielding of INPT trace. 3 SREF Reference Voltage for VSET. Internally generated at VPOS − 1.0 V through 20 kΩ. Can be shorted to VSET for standard mirror operation. 4 COMM Analog Ground. 5 RLIM External Resistor to VPOS. Sets current limit at INPT from 1 mA to 16 mA. ILIM = 48 V/(RLIM + 3 kΩ). 6 VPOS Positive Supply (2.7 V to 8.0 V). 7 N/C Optional Shielding of IOUT Trace. No connection to die. 8 IOUT Output Current. Mirrors current at INPT with a gain of 1.0. Sources current only. PADDLE Exposed Pad. Internally connected to COMM, solder to ground. Rev. A | Page 5 of 17 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION BIAS CONTROL INTERFACE NOISE PERFORMANCE MIRROR RESPONSE TIME INPUT CURRENT LIMITING APPLICATIONS AVERAGE POWER MONITORING TRANSLINEAR LOG AMP INTERFACING EXTENDED OPERATING RANGE USING RLIM AS A SECONDARY MONITOR CHARACTERIZATION METHODS EVALUATION BOARD OUTLINE DIMENSIONS ORDERING GUIDE