link to page 9 link to page 9 link to page 10 link to page 10 link to page 10 link to page 10 AD8128Data SheetAPPLICATIONS INFORMATION KVM APPLICATIONS While these equations give a close approximation of the desired In KVM applications, cable equalization typically occurs at the value for each pin, to achieve optimal performance, it can be root of the KVM network. In a star configuration, a driver is necessary to adjust these values slightly. located at each of the end nodes and a receiver/equalizer is Figure 19 and Figure 20 illustrate circuits that adjusts the located at the single root node. In a daisy-chain configuration, control pins on the AD8128. In Figure 19, a 1 kΩ potentiometer each of the end nodes are connected to one another, and one of adjusts the control pin voltage between the specified range of 0 V to them is connected to the root. Similarly, the drivers are placed 1 V. In Figure 20, a 2 kΩ potentiometer controls the offset pin from on the nodes, and the receivers/equalizers are placed at the root. −2.5 V to +2.5 V. For both of these configurations, a ±5V supply In both of these aforementioned configurations, three AD8128 is assumed. receiver/equalizers can be used at the root node to equalize the +5V transmitted red (R), green (G), and blue (B) channels for up to 4kΩ 100 meters of cable. Since the skew between two pairs of cables in CAT-5 is less than 1%, the control pins can be tied together CONTROL PIN1kΩV and used as a single set of controls. GAIN OR VPEAK0.01µF 7 If the common-mode levels of the inputs permit using the -01 99 AD8128 as a receiver (see the Input Common-Mode Voltage 56 0 Range Considerations section), the input signal must be Figure 19. Circuit to Control VGAIN and VPEAK (0 V to 1 V) terminated by a 100 Ω shunt resistor between the pairs, or by +5V two 50 Ω shunt resistors with a common-mode tap in the middle. 1kΩ This CM tap can extract the sync information from the signal if sync-on-common-mode is used. 2kΩOFFSETAD81280.01µF1kΩVHPFDIFF 8 VCM -01 V 99 IN+50Ω–5V 056 VCMCAT-5VHPFOUT Figure 20. Circuit to Control VOFFSET (±2.5 V) 50ΩVIN–VCMLPFVDIFF 6 01 VVV 99- PEAKGAINOFFSET 056 Figure 18. Single Receiver Configuration for CAT-5 Equalizer DC CONTROL PINS The AD8128 uses two control pins (VGAIN and VPEAK) to adjust the equalization based on the length of the cable and one pin (VOFFSET) to adjust the dc output offset. VGAIN is a user-adjustable 0 V to 1 V broadband gain control pin, and VPEAK is a 0 V to 1 V adjustable high frequency gain pin to equalize for the skin effect in CAT-5 cable. The values of both VPEAK and VGAIN are linearly correlated to the length of the cable to be equalized. A simple formula can approximate the desired values for both of these pins. length( ) m V (3) GAIN 425m/V length( ) m V (4) PEAK 110m/V Rev. A | Page 10 of 12 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE Maximum Power Dissipation ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TEST CIRCUIT THEORY OF OPERATION INPUT COMMON-MODE VOLTAGE RANGE CONSIDERATIONS APPLICATIONS INFORMATION KVM APPLICATIONS DC CONTROL PINS CASCADED APPLICATIONS EXPOSED PAD (EP) LAYOUT AND POWER SUPPLY DECOUPLING CONSIDERATIONS EVALUATION BOARDS OUTLINE DIMENSIONS ORDERING GUIDE