Datasheet P9222-R (IDT) - 8

P9222-R Datasheet 2. Pin Descriptions Table 1. Pin Descriptions Pin Number Name Type Description A1 CM1 Output High-voltage, open-drain output from the modulation FETs. Connect a 47nF capacitor from AC1
to CM1. A2 OD2 Input/Output Open-drain GPIO. This pin is connected to the internal ADC and can measure voltages smaller
than 1.2V. This pin can be left floating if not used. A3 OD0/SCL Input/Output Open-drain GPIO. This pin supports an input of up to 5V, and is used for the I2C SCL
connection. Connect this pin via a pull-up resistor to the system I/O supply. This pin can be left
floating if not used. A4 OD1/SDA Input/Output Open-drain GPIO. This pin supports an input of up to 5V, and is used for the I2C SDA
connection. Connect this pin via a pull-up resistor to the system I/O supply. This pin can be left
floating if not used. A5 CM2 Output High-voltage, open-drain output from the modulation FETs. Connect a 47nF capacitor from AC2
to CM2. B1 CMA Output High-voltage, open-drain output from the modulation FETs. By default, CMA capacitor is not
used for communication. This pin can be left floating if not used. B2 GP1/ADC
IN Input/Output GPIO1. Pin is connected to internal ADC and can measure system voltage smaller than 1.8V.
During startup this pin is set as a high-impedance. This pin can be left floating if not used. B3, H1-H5 PGND GND B4 /INT Output Interrupt output pin. Connect this pin to the application processor (AP) I/O voltage rail using an
external pull-up resistor. The P9222-R drives this pin LOW to notify the AP host of status
changes. B5 CMB Output High-voltage, open-drain modulation FETs. By default, CMB capacitor is not used for
communication. This pin can be left floating if not used. C1 LDO5P0 Output Internal 5V LDO for chip power only. Connect a 1µF and 0.1µF capacitor to ground. C2 GP2 Input C3 GP0/
Thermistor Input/Output C4 /EN Input C5 LDO1P8 Output Internal 1.8V LDO output for logic power. Connect a 1µF and 0.1µF capacitor to ground. D1-D5 VOUT Output Main LDO output pin. Connect at least a 110µF capacitor from this pin to ground. It is not
recommended to directly connect the USB charging port or other voltage sources to these pins.
Back-to-back isolation FETs are recommended. E1-E5 VRECT Input/Output © 2019 Integrated Device Technology, Inc. Power and logic ground. GPIO2. If this pin is pulled high to the internal 1.8V LDO (LDO1P8) using a 10K resistor, the
P9222-R becomes an I2C master during startup to load 100 bytes of user configuration from
external EEPROM. If this pin is pulled to ground, the P9222-R loads the default configuration
from the internal OTP.
GPIO0. This pin can be used to measure coil temperature. The P9222-R interrupts the processor
when the coil voltage goes below 0.6V. During the startup this pin is set as a high-impedance.
Pull this pin to 1.8V with a resistor if not used.
Active-LOW enable pin. To enable the P9222-R, pull this pin to GND. To disable the P9222-R,
pull this pin High. Filter capacitor for the internal rectifier. Capacitance requirements: Connect 210µF and
10.1µF capacitors in parallel from this pin to ground. 8 September 27, 2019