Datasheet MAX6078A, MAX6078B (Maxim) - 2
| 制造商 | Maxim |
| 描述 | Low-Power, Low-Drift, Low-Noise Voltage Reference |
| 页数 / 页 | 13 / 2 — Absolute Maximum Ratings. Package Information. 8 TDFN. Thermal … |
| 文件格式/大小 | PDF / 1.0 Mb |
| 文件语言 | 英语 |
Absolute Maximum Ratings. Package Information. 8 TDFN. Thermal Resistance, Four-Layer Board:. 8 WLP
该数据表的模型线
文件文字版本
MAX6078A/MAX6078B Low-Power, Low-Drift, Low-Noise Voltage Reference
Absolute Maximum Ratings
OUTF to GND .. -0.3V to (VIN + 0.3)V Maximum Continuous Power Dissipation (TA = +70°C) . OUTS to GND ... -0.3V to +6V TDFN (derate 16.7mW/°C above +70°C) ...1333.3mW IN to GND ... -0.3V to +6V WLP (derate 12.34mW/°C above +70°C) ...987.2mW EN to GND .. -0.3V to +6V Operating Temperature Range ...-55°C to +125°C NR to GND .. -0.3V to (VIN + 0.3)V Storage Temperature Range ..-65°C to +150°C Current to/from OUTF .. 50mA Lead Temperature (soldering, 10s) ...+300°C Current to/from OUTS/NR/EN ... 20mA Soldering Temperature (reflow) ..+260°C Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
Package Information 8 TDFN
Package Code T823+1C Outline Number 21-0174 Land Pattern Number 90-0091
Thermal Resistance, Four-Layer Board:
Junction-to-Ambient (θJA) 60°C/W Junction-to-Case Thermal Resistance (θJC) 11°C/W
8 WLP
Package Code W61L1+1 Outline Number 21-100365 Land Pattern Number Refer to Application Note 1891
Thermal Resistance, Four-Layer Board:
Junction-to-Ambient (θJA) 81.03°C/W Junction-to-Case Thermal Resistance (θJC) N/A For the latest package outline information and land patterns (footprints), go to www.maximintegrated.com/packages. Note that a “+”, “#”, or “-” in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains to the package regardless of RoHS status. Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer board. For detailed information on package thermal considerations, refer to www.maximintegrated.com/ thermal-tutorial. www.maximintegrated.com Maxim Integrated | 2 Document Outline General Description Applications Benefits and Features Simplified Block Diagram Absolute Maximum Ratings Package Information 8 TDFN 8 WLP Electrical Characteristics – 2.5V Typical Operating Characteristics Pin Configurations 6 WLP 8 TDFN-EP Pin Description Functional Diagram Typical Operating Circuit Detailed Description Wideband Noise Reduction (NR) Output Bypassing Turn-On Time Output Force and Sense Shutdown Thermal Hysteresis Applications Information Precision Current Source Ordering Information Revision History
Absolute Maximum Ratings
OUTF to GND .. -0.3V to (VIN + 0.3)V Maximum Continuous Power Dissipation (TA = +70°C) . OUTS to GND ... -0.3V to +6V TDFN (derate 16.7mW/°C above +70°C) ...1333.3mW IN to GND ... -0.3V to +6V WLP (derate 12.34mW/°C above +70°C) ...987.2mW EN to GND .. -0.3V to +6V Operating Temperature Range ...-55°C to +125°C NR to GND .. -0.3V to (VIN + 0.3)V Storage Temperature Range ..-65°C to +150°C Current to/from OUTF .. 50mA Lead Temperature (soldering, 10s) ...+300°C Current to/from OUTS/NR/EN ... 20mA Soldering Temperature (reflow) ..+260°C Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
Package Information 8 TDFN
Package Code T823+1C Outline Number 21-0174 Land Pattern Number 90-0091
Thermal Resistance, Four-Layer Board:
Junction-to-Ambient (θJA) 60°C/W Junction-to-Case Thermal Resistance (θJC) 11°C/W
8 WLP
Package Code W61L1+1 Outline Number 21-100365 Land Pattern Number Refer to Application Note 1891
Thermal Resistance, Four-Layer Board:
Junction-to-Ambient (θJA) 81.03°C/W Junction-to-Case Thermal Resistance (θJC) N/A For the latest package outline information and land patterns (footprints), go to www.maximintegrated.com/packages. Note that a “+”, “#”, or “-” in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains to the package regardless of RoHS status. Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer board. For detailed information on package thermal considerations, refer to www.maximintegrated.com/ thermal-tutorial. www.maximintegrated.com Maxim Integrated | 2 Document Outline General Description Applications Benefits and Features Simplified Block Diagram Absolute Maximum Ratings Package Information 8 TDFN 8 WLP Electrical Characteristics – 2.5V Typical Operating Characteristics Pin Configurations 6 WLP 8 TDFN-EP Pin Description Functional Diagram Typical Operating Circuit Detailed Description Wideband Noise Reduction (NR) Output Bypassing Turn-On Time Output Force and Sense Shutdown Thermal Hysteresis Applications Information Precision Current Source Ordering Information Revision History