Datasheet AP1041 (Asahi Kasei Microdevices) - 7
| 制造商 | Asahi Kasei Microdevices |
| 描述 | 32V 1ch H-Bridge Motor Driver IC |
| 页数 / 页 | 18 / 7 — Control Logic. Protection Functions |
| 文件格式/大小 | PDF / 854 Kb |
| 文件语言 | 英语 |
Control Logic. Protection Functions
该数据表的模型线
文件文字版本
link to page 7 link to page 7 [AP1041] (Ta =25C; VM=8V~32V; unless otherwise specified) Parameter Symbol Condition Min. Typ. Max. Unit
Control Logic
VDC Pin Voltage VDC 4.1 4.5 4.9 V Input High Level Voltage VIH 2.0 - - V Input Low Level Voltage VIL - - 0.8 V Input Hysteresis VHYS (Note 13) 0.2 0.4 - V Input High Level Current IIH VIH=5.5V -1.0 - 1.0 μA Input Low Level Current IIL VIL=0V -1.0 - 1.0 μA Pull-down Resistance RPD 50 100 150 kΩ
Protection Functions
VM Under Voltage Lockout VMUVLO 5.7 6.35 7.0 V VM Under Voltage Hysteresis VMHYS 0.4 0.5 0.6 V Overheat Detection Temperature TTSD (Note 13) 150 175 200 °C High-Side Driver I 1.5 Overcurrent Detection Level 2.2 3.5 A COPH Low-Side Driver I 1.5 Overcurrent Detection Level 2.2 3.5 A COPL Overcurrent Detection Time TOCP RTBLANK=22kΩ 1.4 2.0 2.6 μs FLAG Pin Voltage VFLAG Iload=0.2mA - - 0.4 V Output short Detection Time TOSD 2.3 4.7 8.0 μs Note 11. PWM-duty accuracy is the accuracy when the input voltage of the VREF pin is set to a resistively divided voltage of the VDC pin. Note 12. All voltages are with respect to GND (GND = 0V). Note 13. Not tested in production. a) SEL= “L”, INA = “H”, INB = PWM b) SEL= “H”, INA = “H”, INB = PWM Figure 4. Timing Chart of Output Propagation Delay Time SEL= “H”, INA= “H”, INB = PWM Figure 5. Timing Chart of Minimum Output Pulse Width 019002294-E-00 2019/03 - 7 - Document Outline 1. General Description 2. Features 3. Table of Contents 4. Block Diagram 5. Pin Configulations and Functions 5.1. Pin Layout 5.2. Pin Functions 6. Absolute Maximum Ratings 7. Recommended Operation Conditions 8. Electric Characteristics 9. Functional Descriptions 9.1. Control Logic 9.2. PWM Duty Control 9.3. Protection Functions 10. Recommended External Circuit 11. Package 11.1. Outline Dimensions 11.2. Land Pattern 11.3. Marking 12. Ordering Guide 13. Revision History IMPORTANT NOTICE
Control Logic
VDC Pin Voltage VDC 4.1 4.5 4.9 V Input High Level Voltage VIH 2.0 - - V Input Low Level Voltage VIL - - 0.8 V Input Hysteresis VHYS (Note 13) 0.2 0.4 - V Input High Level Current IIH VIH=5.5V -1.0 - 1.0 μA Input Low Level Current IIL VIL=0V -1.0 - 1.0 μA Pull-down Resistance RPD 50 100 150 kΩ
Protection Functions
VM Under Voltage Lockout VMUVLO 5.7 6.35 7.0 V VM Under Voltage Hysteresis VMHYS 0.4 0.5 0.6 V Overheat Detection Temperature TTSD (Note 13) 150 175 200 °C High-Side Driver I 1.5 Overcurrent Detection Level 2.2 3.5 A COPH Low-Side Driver I 1.5 Overcurrent Detection Level 2.2 3.5 A COPL Overcurrent Detection Time TOCP RTBLANK=22kΩ 1.4 2.0 2.6 μs FLAG Pin Voltage VFLAG Iload=0.2mA - - 0.4 V Output short Detection Time TOSD 2.3 4.7 8.0 μs Note 11. PWM-duty accuracy is the accuracy when the input voltage of the VREF pin is set to a resistively divided voltage of the VDC pin. Note 12. All voltages are with respect to GND (GND = 0V). Note 13. Not tested in production. a) SEL= “L”, INA = “H”, INB = PWM b) SEL= “H”, INA = “H”, INB = PWM Figure 4. Timing Chart of Output Propagation Delay Time SEL= “H”, INA= “H”, INB = PWM Figure 5. Timing Chart of Minimum Output Pulse Width 019002294-E-00 2019/03 - 7 - Document Outline 1. General Description 2. Features 3. Table of Contents 4. Block Diagram 5. Pin Configulations and Functions 5.1. Pin Layout 5.2. Pin Functions 6. Absolute Maximum Ratings 7. Recommended Operation Conditions 8. Electric Characteristics 9. Functional Descriptions 9.1. Control Logic 9.2. PWM Duty Control 9.3. Protection Functions 10. Recommended External Circuit 11. Package 11.1. Outline Dimensions 11.2. Land Pattern 11.3. Marking 12. Ordering Guide 13. Revision History IMPORTANT NOTICE