Datasheet HT45B3305H (Holtek) - 10

HT45B3305H HT45B3305H CAN Bus Controller CAN Bus Controller
The device contains two sets of interface modules which are the four line SPI interface and the two line I2C interface, to allow an easy method of communication with external Master devices. Having relatively simple communication protocols, these serial interface types allow the device to interface to external SPI or I2C based microcontrollers. The choice of whether the SPI or I2C type is used is made using the SSIF pin input signal and with the RES pin low. Users can choose using SPI or I2C serial interface for the data transfer, based on their MCU support interfaces and application speed requirements. SSIF pin should connect a 500kΩ pull-low resistor. Communication interface switching is implemented via this pin. During the device reset period which is caused by keeping the RES pin low, the SSIF pin input can be used to select the serial interface used with the master. The selections are shown in the following table. When release the RES pin, the external reset is
RES & SSIF Conditions Selected Interface
RES=Low, SSIF=Low SPI interface RES=Low, SSIF=High I2C interface
Interface Selections
The 32-byte Writter Buffer can be used to store the Control byte, Register Address byte and up to 31 bytes Data which are received or to be transmit in a communication. SPI Logic Write buffer & Data check Protocol I2C Logic Logic Write Buffer WDBUF0 WDBUFm
Block Diagram SPI and I2C Frame Fields
Following the Communication Protocol, the SPI or I2C frame should contain five data fields which are Control Byte, Register Address, Control CheckSum, Data and Data CheckSum. • A 1-byte control field, including: ♦ A 3-bit control instruction code defining the operation command. ♦ A 5-bit data length code bits defining the size (in bytes) of the data field. • A 1-byte Register Address field, defining the start register address to read from or to write into • A 1-byte Control CheckSum field, Detecting errors during the control byte and the address byte transmission.The control checksum is based on a XOR operation • A Data field of up to 31 bytes • A 1-byte Data CheckSum field, Detecting errors during the data transmission.The control checksum is based on a XOR operation of all write/read data. Rev. 1.00 10 December 25, 2019 Rev. 1.00 11 December 25, 2019 Document Outline Features Applications General Description Block Diagram Pin Assignment Pin Description Absolute Maximum Ratings D.C. Characteristics A.C. Characteristics System Frequency Characteristics Timing Characteristics Operating Voltage Characteristics Operating Current Characteristics Standby Current Characteristics CAN Electrical Characteristics Power-on Reset Characteristics Power Control Function CLKOUT Pin IDLE Mode SLEEP Mode and Wake-up Functional Description Write Buffer and Data Check SPI and I2C Frame Fields SPI Serial Interface I2C Serial Interface HT45B3305H CAN Block Diagram Interrupt Output Pins Message RAM and FIFO Buffer Configuration HT45B3305H CAN Operating Modes CAN Application Register Description Register Map Register Reset Condition Register Description Application Circuits SPI Serial Interface I2C Serial Interface Package Information 16-pin NSOP (150mil) Outline Dimensions SAW Type 16-pin QFN (3mm×3mm for FP0.25mm) Outline Dimensions