Datasheet AD22057 (Analog Devices) - 2
| 制造商 | Analog Devices |
| 描述 | Single-Supply Sensor Interface Amplifier |
| 页数 / 页 | 9 / 2 — AD22057–SPECIFICATIONS (TA = +25. C, VS = +5 V, VCM = 0, RL = 10 k. … |
| 修订版 | B |
| 文件格式/大小 | PDF / 164 Kb |
| 文件语言 | 英语 |
AD22057–SPECIFICATIONS (TA = +25. C, VS = +5 V, VCM = 0, RL = 10 k. unless otherwise noted) Parameter. Comments
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AD22057–SPECIFICATIONS (TA = +25
ⴗ
C, VS = +5 V, VCM = 0, RL = 10 k
⍀
unless otherwise noted) Parameter Comments Test Conditions Min Typ Max Units
INPUTS (PINS 1 AND 8) +CMR Positive Common-Mode Range TA = TMIN to TMAX +24 V CMR Negative Common-Mode Range TA = TMIN to +85°C –1.0 V CMRRLF Common-Mode Rejection Ratio f ≤ 10 Hz 80 90 dB CMRRHF Common-Mode Rejection Ratio f = 1 kHz 80 90 dB RINCM Common-Mode Input Resistance Pin 1 or Pin 8 to Pin 2 180 240 300 kΩ RMATCH Matching of Resistances ±0.5 % RINDIFF Differential Input Resistance Pin 1 to Pin 8 280 400 kΩ PREAMPLIFIER GCL Closed-Loop Gain1 9.7 10.0 10.3 V/V VO Output Voltage Range (Pin 3) +0.01 +4.8 V RO Output Resistance2 97 100 103 kΩ OUTPUT BUFFER GCL Closed-Loop Gain1 RLOAD ≥ 10 kΩ 1.94 2.0 2.06 V/V VO Output Voltage Range3 +0.02 +4.8 V RO Output Resistance (Pin 5) VO ≥ 0.1 V dc 2.0 Ω OVERALL SYSTEM G Gain1 VO ≥ 0.1 V dc 19.9 20.0 20.1 V/V Gain Drift TA = TMIN to TMAX –62.5 +62.5 ppm/°C VOS Input Offset Voltage4 –1 0.03 1 mV Offset Drift TA = TMIN to TMAX –12.5 +12.5 µV/°C OFS Midscale Offset (Pin 7) Scaling 0.49 0.50 0.51 V/V Input Resistance Pin 7 to Pin 2 2.5 3.0 kΩ IOSC Short-Circuit Output Current 7 11 25 mA TA = TMIN to TMAX 5 27 mA BW–3 dB –3 dB Bandwidth VO = +1 V dc 20 30 kHz SR Slew Rate 0.2 V/µs NSD Noise Spectral Density4 f = 100 Hz to 10 kHz 0.2 µV/√Hz PSR Power Supply Rejection VS = 5 V, VO = 1 V to 4.2 V VS = 24 V, VO = 1 V to 22 V TA = TMIN to TMAX VOS Input Offset Voltage4 20.0 µV/V G Gain 0.05 %/V POWER SUPPLY VS Operating Range TA = TMIN to TMAX 3 5 36 V IS Quiescent Supply Range5 TA = +25°C, VS = +5 V 200 500 µA TEMPERATURE RANGE TOP Operating Temperature Range –40 +125 °C PACKAGE 8-Lead SOIC (R-8) AD22057RZ NOTES 1Specified for default mode i.e., with no external components. The overall gain is trimmed to ±0.5% while the individual gains of A1 and A2 may be subject to a maximum ± 3% tolerance. Note that the actual gain in a particular application can be modified by the use of external resistor networks. 2The actual output resistance of A1 is only a few ohms, but access to this output, via Pin 3, is always through a 100 k Ω resistor, which is trimmed to ±3%. 3For VCM ≤ 20 V. For VCM > 20 V, VOL ⯝ 1 mV/V × VCM. 4Referred to the input (Pins 1 and 8). 5With VDM = 0 V. Differential mode signals are referred to as VDM, while VCM refers to common-mode voltages. Specifications subject to change without notice. –2– REV. B
ⴗ
C, VS = +5 V, VCM = 0, RL = 10 k
⍀
unless otherwise noted) Parameter Comments Test Conditions Min Typ Max Units
INPUTS (PINS 1 AND 8) +CMR Positive Common-Mode Range TA = TMIN to TMAX +24 V CMR Negative Common-Mode Range TA = TMIN to +85°C –1.0 V CMRRLF Common-Mode Rejection Ratio f ≤ 10 Hz 80 90 dB CMRRHF Common-Mode Rejection Ratio f = 1 kHz 80 90 dB RINCM Common-Mode Input Resistance Pin 1 or Pin 8 to Pin 2 180 240 300 kΩ RMATCH Matching of Resistances ±0.5 % RINDIFF Differential Input Resistance Pin 1 to Pin 8 280 400 kΩ PREAMPLIFIER GCL Closed-Loop Gain1 9.7 10.0 10.3 V/V VO Output Voltage Range (Pin 3) +0.01 +4.8 V RO Output Resistance2 97 100 103 kΩ OUTPUT BUFFER GCL Closed-Loop Gain1 RLOAD ≥ 10 kΩ 1.94 2.0 2.06 V/V VO Output Voltage Range3 +0.02 +4.8 V RO Output Resistance (Pin 5) VO ≥ 0.1 V dc 2.0 Ω OVERALL SYSTEM G Gain1 VO ≥ 0.1 V dc 19.9 20.0 20.1 V/V Gain Drift TA = TMIN to TMAX –62.5 +62.5 ppm/°C VOS Input Offset Voltage4 –1 0.03 1 mV Offset Drift TA = TMIN to TMAX –12.5 +12.5 µV/°C OFS Midscale Offset (Pin 7) Scaling 0.49 0.50 0.51 V/V Input Resistance Pin 7 to Pin 2 2.5 3.0 kΩ IOSC Short-Circuit Output Current 7 11 25 mA TA = TMIN to TMAX 5 27 mA BW–3 dB –3 dB Bandwidth VO = +1 V dc 20 30 kHz SR Slew Rate 0.2 V/µs NSD Noise Spectral Density4 f = 100 Hz to 10 kHz 0.2 µV/√Hz PSR Power Supply Rejection VS = 5 V, VO = 1 V to 4.2 V VS = 24 V, VO = 1 V to 22 V TA = TMIN to TMAX VOS Input Offset Voltage4 20.0 µV/V G Gain 0.05 %/V POWER SUPPLY VS Operating Range TA = TMIN to TMAX 3 5 36 V IS Quiescent Supply Range5 TA = +25°C, VS = +5 V 200 500 µA TEMPERATURE RANGE TOP Operating Temperature Range –40 +125 °C PACKAGE 8-Lead SOIC (R-8) AD22057RZ NOTES 1Specified for default mode i.e., with no external components. The overall gain is trimmed to ±0.5% while the individual gains of A1 and A2 may be subject to a maximum ± 3% tolerance. Note that the actual gain in a particular application can be modified by the use of external resistor networks. 2The actual output resistance of A1 is only a few ohms, but access to this output, via Pin 3, is always through a 100 k Ω resistor, which is trimmed to ±3%. 3For VCM ≤ 20 V. For VCM > 20 V, VOL ⯝ 1 mV/V × VCM. 4Referred to the input (Pins 1 and 8). 5With VDM = 0 V. Differential mode signals are referred to as VDM, while VCM refers to common-mode voltages. Specifications subject to change without notice. –2– REV. B