Datasheet SID11x2KQ SCALE-iDriver Family (Power Integrations) - 7

SID11x2KQ
To avoid parasitic power-switch-conduction during system power-on, P (2) P = VVCC # IVCC the gate is connected to COM through 22 kW resistor. P (3) SNL = VTOT # IVISO Figure 13 shows how switch desaturation can be measured using During IC operation, the P power is shared between turn-on (R ), DRV GH resistors R – R . In this example all the resistors have a value turn-off (R ) external gate resistors and internal driver resistances VCE2 VCE11 GL of 100 kW using 1206 package. The total resistance is 1 MW. The R and R . For junction temperature estimation purposes, the GHI GLI resistors should be chosen to limit current to between 0.6 mA to 0.8 dissipated power under load (P ) inside the IC can be calculated OL mA at maximum DC-link voltage. The sum of R – R should be accordingly to equation 4: VCE2 VCE11 approximately 1 MW for 1200 V semiconductors and 500 kW for 600 V RGHI R semiconductors. In each case the resistor string must provide P GHL b l OL = . 0 5 # QGATE # fS # VTOT # + sufficient creepage and clearance distances between col ector of the RGHI + RGH RGHL + RGL semiconductor and SCALE-iDriver. The low leakage diode D keeps CL (4) the short-circuit duration constant over a wide DC-link voltage range. R and R represent sum of external (R , R ) and power Response time is set up through R and C (typical y 120 kW and GH GL GON GOFF VCE RES semiconductor internal gate resistance (R ): 33 pF respectively for 1200 V semiconductors). If short-circuit GINT detection proves to be too sensitive, the C value can be increased. RES RGH = R GON + RGINT The maximum short-circuit duration must be limited to the maximum value given in the semiconductor data sheet. RGL = RGOFF + RGINT Figure 14 il ustrates how diodes D and D may be used to Total IC power dissipation (P ) is estimated as sum of equations 2, 3 VCE1 VCE2 DIS measure switch desaturation. For insulation, two diodes in SMD and 4: packages are used (STTH212U for example). R connected to VISO RES PDIS = PP + PSNL + POL (5) guarantees current flow through the diodes when the semiconductor is in the on-state. When the switch desaturates, C starts to be The operating junction temperature (T ) for given ambient tempera- RES J charged through R . In this configuration the response time is ture (T ) can be estimated according to equation 6: RES A control ed by R and C . In this application example C = 33 pF RES RES RES and R = 62 kW; if desaturation is too sensitive or the short-circuit TJ = iJA # PDIS + T (6) RES A duration too long, both C and R can be adjusted. RES RES
Example
It is important to ensure that PCB traces do not cover the area below An example is given below, the desaturation resistors or diodes D and D . This is a critical VCE1 VCE2 design requirement to avoid coupling capacitance with the SCALE- ƒ = 20 kHz, T = 85 °C, V = 25 V, V = 5 V. S A TOT VCC iDriver’s VCE pin and isolation issues within the PCB. Q = 2.5 µC (the gate charge value here should correspond to GATE selected V ), R = 2.5 W, R = R = 1.8 W. Gate resistors are located physical y close to the power semiconductor TOT GINT GON GOFF switch. As these components can get hot, it is recommended that P = 2.5 µC × 20 kHz × 25 V = 1.25 W, according to equation 1. DRV they are placed away from the SCALE-iDriver. P = 5 V × 13.5 mA = 67 mW, according to equation 2 (see Figure 16). P
Power Dissipation and IC Junction
P = 25 V × 7.5 mA = 185 mW, according to equation 3 (see Figure 17). SNL
Temperature Estimation
The dissipated power under load is: First calculation in designing the power semiconductor switch gate POL = 0.5 # . 2 5 C n # 20 kHz # 25 V # driver stage is to calculate the required gate power - P . The power DRV is calculated based on equation 1: . 1 45 X . 1 2 X b + l ≅ . 1 45 X + . 4 3 X . 1 2 X + 4. 0.3 , W 3 X PDRV = QGATE # fS # VTOT (1) according to equation 4. where, R = 1.45 W as maximum data sheet value. Q – Control ed power semiconductor switch gate charge (derived GHI GATE R = 1.2 W as maximum data sheet value. for the particular gate potential range defined by V ). See semicon- GHL TOT R = R = 1.8 W + 2.5 W = 4.3 W. ductor manufacturer data sheet. GH GL P = 67 mW + 185 mW + 300 mW = 552 mW according to equation 5. ƒ – Switching frequency which is same as applied to the IN pin of DIS S T = 67 °C/W × 552 mW + 85 °C = 122 °C according to equation 6. SCALE-iDriver. J Estimated junction temperature for this design would be approximately V – SCALE-iDriver secondary-side supply voltage. TOT 122 °C and is lower than the recommended maximum value. As the In addition to P , P (primary-side IC power dissipation) and P gate charge is not adjusted to selected V and internal IC resistor TOT DRV P SNL (secondary-side IC power dissipation without capacitive load) must be values are maximum values, it is understood that the example considered. Both are ambient temperature and switching frequency represents worst-case conditions. dependent (see typical performance characteristics).
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Rev. C 09/19 www.power.com Document Outline Product Highlights Description Scale-iDriver − Product Portfolio Pin Functional Description SCALE-iDriver Functional Description Application Examples and Components Selection Power Dissipation and IC Junction Temperature Estimation Absolute Maximum Ratings Thermal Resistance Key Electrical Characteristics Typical Performance Characteristics eSOP-R16B (K Package) MSL Table ESD and Latch-Up Table IEC 60664-1 Rating Table Electrical Characteristics (EMI) Table Regulatory Information Table Part Ordering Information