Datasheet TLS715B0NAV50 (Infineon) - 6
| 制造商 | Infineon |
| 描述 | OPTIREG Linear TLS715B0NAV50. Low dropout li near voltage regulator |
| 页数 / 页 | 22 / 6 — OPTIREG™ Linear TLS715B0NAV50 Low dropout linear voltage regulator … |
| 修订版 | 01_10 |
| 文件格式/大小 | PDF / 686 Kb |
| 文件语言 | 英语 |
OPTIREG™ Linear TLS715B0NAV50 Low dropout linear voltage regulator General product characteristics
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OPTIREG™ Linear TLS715B0NAV50 Low dropout linear voltage regulator General product characteristics 3 General product characteristics 3.1 Absolute maximum ratings Table 1 Absolute maximum ratings1)
Tj = -40°C to 150°C; all voltages with respect to ground (unless otherwise specified)
Parameter Symbol Values Unit Note or Number Test Condition Min. Typ. Max. Input I, Enable EN
Voltage VI, VEN -0.3 – 45 V – P_4.1.1
Output Q
Voltage VQ -0.3 – 7 V – P_4.1.2
Temperature
Junction temperature Tj -40 – 150 °C – P_4.1.3 Storage temperature Tstg -55 – 150 °C – P_4.1.4
ESD absorption
ESD susceptibility to GND VESD -2 – 2 kV HBM2) P_4.1.5 ESD susceptibility to GND VESD -750 – 750 V CDM3) P_4.1.6 1) Not subject to production test, specified by design. 2) ESD susceptibility, HBM according to ANSI/ESDA/JEDEC JS001 (1.5 kΩ, 100 pF) 3) ESD susceptibility, Charged Device Model “CDM” according JEDEC JESD22-C101
Notes
1. Stresses above the ones listed here may cause permanent damage to the device. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. 2. Integrated protection functions are designed to prevent IC destruction under fault conditions described in the data sheet. Fault conditions are considered as “outside” normal operating range. Protection functions are not designed for continuous repetitive operation. Datasheet 6 Rev. 1.1 2019-07-31 Document Outline Features Potential applications Product validation Description Table of contents 1 Block diagram 2 Pin configuration 2.1 Pin assignment PG-TSNP-7 2.2 Pin definitions and functions PG-TSNP-7 3 General product characteristics 3.1 Absolute maximum ratings 3.2 Functional range 3.3 Thermal resistance 4 Block description and electrical characteristics 4.1 Voltage regulation 4.2 Typical performance characteristics voltage regulator 4.3 Current consumption 4.4 Typical performance characteristics current consumption 4.5 Enable 4.6 Typical performance characteristics enable 5 Application information 5.1 Application diagram 5.2 Selection of external components 5.2.1 Input pin 5.2.2 Output pin 5.3 Thermal considerations 5.4 Reverse polarity protection 5.5 Further application information 6 Package information 7 Revision history
OPTIREG™ Linear TLS715B0NAV50 Low dropout linear voltage regulator General product characteristics 3 General product characteristics 3.1 Absolute maximum ratings Table 1 Absolute maximum ratings1)
Tj = -40°C to 150°C; all voltages with respect to ground (unless otherwise specified)
Parameter Symbol Values Unit Note or Number Test Condition Min. Typ. Max. Input I, Enable EN
Voltage VI, VEN -0.3 – 45 V – P_4.1.1
Output Q
Voltage VQ -0.3 – 7 V – P_4.1.2
Temperature
Junction temperature Tj -40 – 150 °C – P_4.1.3 Storage temperature Tstg -55 – 150 °C – P_4.1.4
ESD absorption
ESD susceptibility to GND VESD -2 – 2 kV HBM2) P_4.1.5 ESD susceptibility to GND VESD -750 – 750 V CDM3) P_4.1.6 1) Not subject to production test, specified by design. 2) ESD susceptibility, HBM according to ANSI/ESDA/JEDEC JS001 (1.5 kΩ, 100 pF) 3) ESD susceptibility, Charged Device Model “CDM” according JEDEC JESD22-C101
Notes
1. Stresses above the ones listed here may cause permanent damage to the device. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. 2. Integrated protection functions are designed to prevent IC destruction under fault conditions described in the data sheet. Fault conditions are considered as “outside” normal operating range. Protection functions are not designed for continuous repetitive operation. Datasheet 6 Rev. 1.1 2019-07-31 Document Outline Features Potential applications Product validation Description Table of contents 1 Block diagram 2 Pin configuration 2.1 Pin assignment PG-TSNP-7 2.2 Pin definitions and functions PG-TSNP-7 3 General product characteristics 3.1 Absolute maximum ratings 3.2 Functional range 3.3 Thermal resistance 4 Block description and electrical characteristics 4.1 Voltage regulation 4.2 Typical performance characteristics voltage regulator 4.3 Current consumption 4.4 Typical performance characteristics current consumption 4.5 Enable 4.6 Typical performance characteristics enable 5 Application information 5.1 Application diagram 5.2 Selection of external components 5.2.1 Input pin 5.2.2 Output pin 5.3 Thermal considerations 5.4 Reverse polarity protection 5.5 Further application information 6 Package information 7 Revision history