Datasheet LT8365 (Analog Devices) - 9

link to page 7 LT8365
OPERATION
The LT8365 uses a fixed frequency, current mode control If the EN/UVLO pin voltage is below 1.6V, the LT8365 scheme to provide excellent line and load regulation. Op- enters undervoltage lockout (UVLO), and stops switching. eration can be best understood by referring to the Block When the EN/UVLO pin voltage is above 1.68V (typical), Diagram. An oscillator (with frequency programmed by a the LT8365 resumes switching. If the EN/UVLO pin voltage resistor at the RT pin) turns on the internal power switch at is below 0.2V, the LT8365 draws less than 1µA from VIN. the beginning of each clock cycle. Current in the inductor For the SYNC/MODE pin tied to ground or <0.14V, the then increases until the current comparator trips and turns LT8365 will enter low output ripple Burst Mode opera- off the power switch. The peak inductor current at which tion for ultra low quiescent current during light loads to the switch turns off is controlled by the voltage on the VC maintain high efficiency. For a 100k resistor from SYNC/ pin. The error amplifier servos the VC pin by comparing the MODE pin to GND, the LT8365 uses Burst Mode opera- voltage on the FBX pin with an internal reference voltage tion for improved efficiency at light loads but seamlessly (1.60V or –0.80V, depending on the chosen topology). transitions to Spread-Spectrum Modulation of switching When the load current increases it causes a reduction in frequency for low EMI at heavy loads. For the SYNC/ the FBX pin voltage relative to the internal reference. This MODE pin floating (left open), the LT8365 uses pulse- causes the error amplifier to increase the VC pin voltage skipping mode, at the expense of hundreds of microamps, until the new load current is satisfied. In this manner, the to maintain output voltage regulation at light loads by error amplifier sets the correct peak switch current level skipping switch pulses. For the SYNC/MODE pin tied to to keep the output in regulation. INTVCC or >1.7V, the LT8365 uses pulse-skipping mode The LT8365 is capable of generating either a positive or and performs Spread-Spectrum Modulation of switching negative output voltage with a single FBX pin. It can be frequency. For the SYNC/MODE pin driven by an external configured as a boost or SEPIC converter to generate a clock, the converter switching frequency is synchronized positive output voltage, or as an inverting converter to to that clock and pulse-skipping mode is also enabled. See generate a negative output voltage. When configured as the Pin Functions section for SYNC/MODE pin. a Boost converter, as shown in the Block Diagram, the The LT8365 includes a BIAS pin to improve efficiency FBX pin is pulled up to the internal bias voltage of 1.60V across all loads. The LT8365 intelligently chooses between by a voltage divider (R1 and R2) connected from VOUT the V to GND. Amplifier A2 becomes inactive and amplifier A1 IN and BIAS pins to supply the INTVCC for best ef- ficiency. The INTV performs (inverting) amplification from FBX to V CC supply current can be drawn from C. When the BIAS pin instead of the V the LT8365 is in an inverting configuration, the FBX pin IN pin for 4.4V ≤ BIAS ≤ VIN. is pulled down to –0.80V by a voltage divider from VOUT Protection features ensure the immediate disable of to GND. Amplifier A1 becomes inactive and amplifier A2 switching and reset of the SS pin for any of the following performs (non-inverting) amplification from FBX to VC. faults: internal reference UVLO, INTVCC UVLO, switch cur- rent > 1.5× maximum limit, EN/UVLO < 1.6V or junction temperature > 170°C. Rev. 0 For more information www.analog.com 9 Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Order Information Pin Configuration Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Operation Applications Information Typical Applications Package Description Typical Application Related Parts