Datasheet VCNL36826S (Vishay) - 5
| 制造商 | Vishay |
| 描述 | Proximity Sensor With Interrupt, VCSEL, and I²C Interface |
| 页数 / 页 | 16 / 5 — VCNL36826S. PARAMETER TIMING INFORMATION |
| 文件格式/大小 | PDF / 196 Kb |
| 文件语言 | 英语 |
VCNL36826S. PARAMETER TIMING INFORMATION
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VCNL36826S
www.vishay.com Vishay Semiconductors
PARAMETER TIMING INFORMATION
I2C BUS CLOCK (SCLK) I2C BUS DATA SA7 SA6 SA5 SA4 SA3 SA2 SA1 W SA6 SA5 SA4 SA3 SA2 SA1 SA0 SA7 (SDAT) Start by ACK by ACK by master VCNL36826S VCNL36826S I2C bus slave address byte Command code I2C BUS CLOCK (SCLK) I2C BUS DATA SA7 SA6 SA5 SA4 SA3 SA2 SA1 SA0 SA7 SA6 SA5 SA4 SA3 SA2 SA1 SA0 (SDAT) ACK by ACK by Stop by VCNL36826S VCNL36826S master Data byte low Data byte high Fig. 2 - I2C Bus Timing for Sending Word Command Format I2C BUS CLOCK (SCLK) I2C BUS DATA SA7 SA6 SA5 SA4 SA3 SA2 SA1 W SA7 SA6 SA5 SA4 SA3 SA2 SA1 SA0 (SDAT) Start by ACK by ACK by master VCNL36826S VCNL36826S I2C bus slave address byte Command code I2C BUS CLOCK (SCLK) I2C BUS DATA SA7 SA6 SA5 SA4 SA3 SA2 SA1 R SA7 SA6 SA5 SA4 SA3 SA2 SA1 SA0 (SDAT) Start by ACK by ACK by master VCNL36826S master I2C bus slave address byte Data byte low I2C BUS CLOCK (SCLK) I2C BUS DATA SA7 SA6 SA5 SA4 SA3 SA2 SA1 SA0 (SDAT) NACK by Stop by master master Data byte high Fig. 3 - I2C Bus Timing for Receiving Word Command Format Rev. 1.0, 29-Jan-2020
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Document Number: 84964 For technical questions, contact: sensorstechsupport@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
www.vishay.com Vishay Semiconductors
PARAMETER TIMING INFORMATION
I2C BUS CLOCK (SCLK) I2C BUS DATA SA7 SA6 SA5 SA4 SA3 SA2 SA1 W SA6 SA5 SA4 SA3 SA2 SA1 SA0 SA7 (SDAT) Start by ACK by ACK by master VCNL36826S VCNL36826S I2C bus slave address byte Command code I2C BUS CLOCK (SCLK) I2C BUS DATA SA7 SA6 SA5 SA4 SA3 SA2 SA1 SA0 SA7 SA6 SA5 SA4 SA3 SA2 SA1 SA0 (SDAT) ACK by ACK by Stop by VCNL36826S VCNL36826S master Data byte low Data byte high Fig. 2 - I2C Bus Timing for Sending Word Command Format I2C BUS CLOCK (SCLK) I2C BUS DATA SA7 SA6 SA5 SA4 SA3 SA2 SA1 W SA7 SA6 SA5 SA4 SA3 SA2 SA1 SA0 (SDAT) Start by ACK by ACK by master VCNL36826S VCNL36826S I2C bus slave address byte Command code I2C BUS CLOCK (SCLK) I2C BUS DATA SA7 SA6 SA5 SA4 SA3 SA2 SA1 R SA7 SA6 SA5 SA4 SA3 SA2 SA1 SA0 (SDAT) Start by ACK by ACK by master VCNL36826S master I2C bus slave address byte Data byte low I2C BUS CLOCK (SCLK) I2C BUS DATA SA7 SA6 SA5 SA4 SA3 SA2 SA1 SA0 (SDAT) NACK by Stop by master master Data byte high Fig. 3 - I2C Bus Timing for Receiving Word Command Format Rev. 1.0, 29-Jan-2020
5
Document Number: 84964 For technical questions, contact: sensorstechsupport@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000