Datasheet LTC7804 (Analog Devices) - 10

link to page 15 LTC7804
PIN FUNCTIONS (MSOP/QFN) SS (Pin 1/Pin 3):
Output Soft-Start Input. The LTC7804 to INTVCC to enable spread spectrum dithering of the oscil- regulates the VFB voltage to the lesser of 1.2V or the voltage lator or to ground to disable spread spectrum. on the SS pin. An internal 12.5µA pull-up current source is
MODE (Pin 9/Pin 11):
Mode Select Input. This input deter- connected to this pin. A capacitor to ground at this pin sets mines how the LTC7804 operates at light loads. Pulling this the ramp time to the final regulated output voltage. The ramp pin to ground selects Burst Mode operation. An internal time is equal to 1ms for every 10nF of capacitance. 100k resistor to ground also invokes Burst Mode operation
SENSE– (Pin 2/Pin 4):
The Negative (−) Input to the when the pin is floating. Tying this pin to INTVCC forces con- Differential Current Comparator. The ITH pin voltage and tinuous inductor current operation. Tying this pin to INTVCC controlled offsets between the SENSE– and SENSE+ pins through a 100k resistor selects pulse-skipping operation. in conjunction with RSENSE set the current trip threshold.
INTVCC (Pin 10/Pin 12):
Output of the Internal 5.15V Low
SENSE+ (Pin 3/Pin 5):
The Positive (+) Input to the Dropout Regulator (LDO). The driver and control circuits Differential Current Comparator. When SENSE+ is greater are powered by this supply. Must be decoupled to GND than INTVCC, the SENSE+ pin supplies current to the cur- with a minimum of 4.7μF ceramic or tantalum capacitor. rent comparator.
EXTVCC (Pin 11/Pin 13):
External Power Input to an Internal
VFB (Pin 4/Pin 6):
Error Amplifier Feedback Input. Connect LDO Connected to INTVCC. This LDO supplies INTVCC power, an external resistor divider between the output voltage bypassing the internal LDO powered from VBIAS whenever and the VFB pin to set the regulated output voltage. EXTVCC is higher than 4.7V. See INTVCC Regulators in the
ITH (Pin 5/Pin 7):
Error Amplifier Outputs and Switching Applications Information section. Do not exceed 30V on Regulator Compensation Point. The current comparator this pin. Tie this pin to GND if the EXTVCC LDO is not used. trip point increases with this control voltage. Place com-
VBIAS (Pin 12/Pin 14):
Main Bias Supply Pin. A bypass pensation components between the ITH pin and GND. capacitor should be tied between this pin and GND. It is
RUN (Pin 6/Pin 8):
Run Control Input. Forcing this pin normally tied to the input supply VIN or the output of the below 1.2V disables switching of the corresponding boost converter. controller. Forcing this pin below 0.7V shuts down the
BG (Pin 13/Pin 15):
High Current Gate Drives for Bottom LTC7804, reducing quiescent current to approximately N-Channel MOSFET. Voltage swing at this pin is from GND 1.2µA. This pin can be tied to VIN for always-on operation. to INTVCC.
FREQ (Pin 7/Pin 9):
Frequency Control Pin for the
BOOST (Pin 14/Pin 16):
Bootstrapped Supply to the Top Internal VCO. Connecting the pin to GND forces the VCO Side Floating Driver. Connect a capacitor between the to a fixed low frequency of 375kHz. Connecting the pin BOOST and SW pin. Also connect a low-leakage Schottky to INTV diode between the BOOST and INTV CC forces the VCO to a fixed high frequency of CC pins. 2.25MHz. Frequencies between 100kHz and 3MHz can
TG (Pin 15/Pin 1):
High Current Gate Drive for the Top be programmed using a resistor between FREQ and GND. N-Channel MOSFET. This is the output of floating driver Minimize the capacitance on this pin. with a voltage swing of INTVCC superimposed on the
PLLIN/SPREAD (Pin 8/Pin 10):
External Synchronization switch node voltage SW. Input and Spread Spectrum Selection. When an external
SW (Pin 16/Pin 2):
Switch Node Connection to the Inductor. clock is applied to this pin, the phase-locked loop will force
GND (Exposed Pad Pin 17/Exposed Pad Pin 17):
Ground. the rising BG signal to be synchronized with the rising edge Connects to the source of the bottom (main) N-channel of the external clock. When an external clock is present, the MOSFET and the (−) terminal(s) of C regulators operate in pulse-skipping mode if it is selected IN and COUT. All small-signal components and compensation components by the MODE pin, or in forced continuous mode otherwise. should also connect to this ground. The exposed pad must When not synchronizing to an external clock, tie this input be soldered to the PCB for rated thermal performance. Rev. 0 10 For more information www.analog.com Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Operation Main Control Loop INTVCC/EXTVCC Power Boost Supply and Dropout (BOOST and SW Pins) Shutdown and Start-Up (RUN, SS Pins) Light Load Current Operation: Burst Mode Operation, Pulse-Skipping or Forced Continuous Mode (MODE Pin) Frequency Selection, Spread Spectrum and Phase-Locked-Loop (FREQ and PLLIN/SPREAD Pins) Operation When VIN > VOUT Operation at Low Input Voltage BOOST Supply Refresh and Internal Charge Pump Applications Information SENSE+ and SENSE– Pins Low Value Resistor Current Sensing Inductor DCR Sensing Inductor Value Calculation Inductor Core Selection Power MOSFET Selection CIN and COUT Selection Setting Output Voltage RUN Pin Soft-Start (SS Pin) INTVCC Regulators Topside MOSFET Driver Supply (CB, DB) Phase-Locked Loop and Frequency Synchronization Setting the Operating Frequency Selecting the Light-Load Operating Mode Minimum On-Time Considerations Fault Conditions: Overtemperature Protection Efficiency Considerations Checking Transient Response Design Example PC Board Layout Checklist PC Board Layout Debugging Package Description Typical Application Related Parts