Datasheet LTC3108 (Analog Devices) - 3

link to page 2 LTC3108
ELECTRICAL CHARACTERISTICS The
l
denotes the specifications which apply over the full operating junction temperature range, otherwise specifications are for TA = 25°C (Note 2). VAUX = 5V, unless otherwise noted. PARAMETER CONDITIONS MIN TYP MAX UNITS
Output Voltage VS1 = VS2 = GND l 2.30 2.350 2.40 V VS1 = VAUX, VS2 = GND l 3.234 3.300 3.366 V VS1 = GND, VS2 = VAUX l 4.018 4.100 4.182 V VS1 = VS2 = VAUX l 4.90 5.000 5.10 V VOUT Quiescent Current VOUT = 3.3V, VOUT2_EN = 0V 0.2 µA VAUX Quiescent Current No Load, All Outputs Charged 6 9 µA LDO Output Voltage 0.5mA Load l 2.134 2.2 2.266 V LDO Load Regulation For 0mA to 2mA Load 0.5 1 % LDO Line Regulation For VAUX from 2.5V to 5V 0.05 0.2 % LDO Dropout Voltage ILDO = 2mA 100 200 mV LDO Current Limit VLDO = 0V l 4 11 mA VOUT Current Limit VOUT = 0V l 2.8 4.5 7.5 mA VSTORE Current Limit VSTORE = 0V l 2.8 4.5 7.5 mA VAUX Clamp Voltage Current into VAUX = 5mA l 5 5.25 5.60 V VSTORE Leakage Current VSTORE = 5V 0.1 0.3 µA VOUT2 Leakage Current VOUT2 = 0V, VOUT2_EN = 0V 0.1 µA VS1, VS2 Threshold Voltage l 0.4 0.85 1.2 V VS1, VS2 Input Current VS1 = VS2 = 5V 0.01 0.1 µA PGOOD Threshold (Rising) Measured Relative to the VOUT Voltage –7.5 % PGOOD Threshold (Falling) Measured Relative to the VOUT Voltage –9 % PGOOD VOL Sink Current = 100µA 0.15 0.3 V PGOOD VOH Source Current = 0 2.1 2.2 2.3 V PGOOD Pull-Up Resistance 1 MΩ VOUT2_EN Threshold Voltage VOUT2_EN Rising l 0.4 1 1.3 V VOUT2_EN Pull-Down Resistance 5 MΩ VOUT2 Turn-On Time 5 µs VOUT2 Turn-Off Time (Note 3) 0.15 µs VOUT2 Current Limit VOUT = 3.3V l 0.15 0.3 0.45 A VOUT2 Current Limit Response Time (Note 3) 350 ns VOUT2 P-Channel MOSFET On-Resistance VOUT = 3.3V (Note 3) 1.3 Ω N-Channel MOSFET On-Resistance C2 = 5V (Note 3) 0.5 Ω
Note 1:
Stresses beyond those listed under Absolute Maximum Ratings temperature (TJ) is calculated from the ambient temperature (TA) and may cause permanent damage to the device. Exposure to any Absolute power dissipation (PD) according to the formula: TJ = TA + (PD • θJA°C/W), Maximum Rating condition for extended periods may affect device where θJA is the package thermal impedance. reliability and lifetime.
Note 3:
Specification is guaranteed by design and not 100% tested in
Note 2:
The LTC3108 is tested under pulsed load conditions such that TJ ≈ production. TA. The LTC3108E is guaranteed to meet specifications from 0°C to 85°C
Note 4:
Failure to solder the exposed backside of the package to the PC junction temperature. Specifications over the –40°C to 125°C operating board ground plane will result in a thermal resistance much higher than junction temperature range are assured by design, characterization and 43°C/W. correlation with statistical process controls. The LTC3108I is guaranteed
Note 5:
The absolute maximum rating is a DC rating. Under certain over the full –40°C to 125°C operating junction temperature range. conditions in the applications shown, the peak AC voltage on the C2 pin Note that the maximum ambient temperature is determined by specific may exceed ±8V. This behavior is normal and acceptable because the operating conditions in conjunction with board layout, the rated thermal current into the pin is limited by the impedance of the coupling capacitor. package thermal resistance and other environmental factors. The junction Rev. D For more information www.analog.com 3 Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Operation Applications Information Typical Applications Package Description Revision History Typical Application Related Parts