Datasheet AD73311L (Analog Devices) - 3

AD73311L AD73311LA Parameter Min Typ Max Unit Test Conditions/Comments
DAC SPECIFICATIONS (Continued) Power Supply Rejection –81 dB Input Signal Level at AVDD and DVDD Pins: 1.0 kHz, 100 mV p-p Sine Wave Group Delay4, 5 25 µs 64 kHz Input Sample Rate, Interpolator Bypassed (CRE:5 = 1) Output DC Offset2, 7 –30 +5 +50 mV PGA = 6 dB Minimum Load Resistance, R 2, 8 L Single-Ended 150 Ω Differential 150 Ω Maximum Load Capacitance, C 2, 8 L Single-Ended 500 pF Differential 100 pF FREQUENCY RESPONSE (ADC AND DAC)9 Typical Output Normalized to fSAMP 0 0 dB 0.03125 –0.1 dB 0.0625 –0.25 dB 0.125 –0.6 dB 0.1875 –1.4 dB 0.25 –2.8 dB 0.3125 –4.5 dB Channel Frequency Response Is 0.375 –7.0 dB Programmable by Means of External 0.4375 –9.5 dB Digital Filtering > 0.5 < –12.5 dB LOGIC INPUTS VINH, Input High Voltage VDD – 0.8 VDD V VINL, Input Low Voltage 0 0.8 V IIH, Input Current 10 µA CIN, Input Capacitance 10 pF LOGIC OUTPUT VOH, Output High Voltage VDD – 0.4 VDD V |IOUT| ≤ 100 µA VOL, Output Low Voltage 0 0.4 V |IOUT| ≤ 100 µA Three-State Leakage Current –10 +10 µA POWER SUPPLIES AVDD1, AVDD2 2.7 3.3 V DVDD 2.7 3.3 V I 10 DD See Table I NOTES 1Operating temperature range is as follows: –40°C to +105°C. Therefore, TMIN = –40°C and TMAX = +105°C. 2Test conditions: Input PGA set for 0 dB gain, Output PGA set for 6 dB gain, no load on analog outputs (unless otherwise noted). 3At input to sigma-delta modulator of ADC. 4Guaranteed by design. 5Overall group delay will be affected by the sample rate and the external digital filtering. 6The ADC’s input impedance is inversely proportional to DMCLK and is approximated by: (4 × 1011)/DMCLK. 7Between VOUTP and VOUTN. 8At VOUT output. 9Frequency responses of ADC and DAC measured with input at audio reference level (the input level that produces an output level of –10 dBm0), with 38 dB preamplifier bypassed and input gain of 0 dB. 10Test Conditions: no load on digital inputs, analog inputs ac coupled to ground, no load on analog outputs. Specifications subject to change without notice.
Table I. Current Summary (AVDD = DVDD = 3.3 V) Analog Internal Digital External Interface Total Current MCLK Conditions Current Current Current (Max) SE ON Comments
ADC Only On 2 4.5 0.5 8.0 1 YES REFOUT Disabled ADC and DAC On 5.6 4.8 0.5 12.5 1 YES REFOUT Disabled REFCAP Only On 0.65 0 0 1.0 0 NO REFOUT Disabled REFCAP and REFOUT Only On 2.7 0 0 3.8 0 NO All Sections Off 0 0.6 0 0.75 0 YES MCLK Active Levels Equal to 0 V and DVDD All Sections Off 1 µA 0.5 µA 0 20 µA 0 NO Digital Inputs Static and Equal to 0 V or DVDD The above values are in mA and are typical values unless otherwise noted. REV. A –3–