Datasheet PI6CG33402C (Diodes) - 3

A product Line of Diodes Incorporated
PI6CG33402C Pin Description Cont. Pin # Pin Name Type Description
17 OE1# Input CMOS Active low input for enabling Q1 pair. This pin has an internal pulldown. 1 =disable outputs, 0 = enable outputs 18 Q1+ Output HCSL Differential true clock output 19 Q1- Output HCSL Differential complementary clock output 20 GNDA Power — Ground for analog circuitry 21 VDDA Power — Power supply for analog circuitry 22 Q2+ Output HCSL Differential true clock output 23 Q2- Output HCSL Differential complementary clock output 24 OE2# Input CMOS Active low input for enabling Q2 pair. This pin has an internal pulldown. 1 =disable outputs, 0 = enable outputs 27 Q3+ Output HCSL Differential true clock output 28 Q3- Output HCSL Differential complementary clock output 29 OE3# Input CMOS Active low input for enabling Q3 pair. This pin has an internal pulldown. 1 =disable outputs, 0 = enable outputs Input notifies device to sample latched inputs and start up on first high 31 PD# Input CMOS assertion. Low enters Power Down Mode, and subsequent high assertions exit Power Down Mode. This pin has an internal pullup resistor Latched select input to select spread spectrum amount at initial power up. 32 SS_SEL_TRI Input Tri-level 1 = 0.5% spread, M = Spread off, 0 = Spread off. This pin has both internal pull-up and pull-down resistor. Refer to SMBUS byte_1 bit 4, 3 = '01' to get -0.25% spread. Epad GND Power — Connect to ground PI6CG33402C www.diodes.com January 2020 Document Number DS42294 Rev 3-2 3 Diodes Incorporated