Datasheet AD7814 (Analog Devices) - 2

制造商Analog Devices
描述Temperature Sensor: 10-Bit Digital in 6-Lead SOT-23
页数 / 页8 / 2 — AD7814–SPECIFICATIONS1 (TA = TMIN to TMAX, VDD = 2.7 V to 5.5 V, unless …
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AD7814–SPECIFICATIONS1 (TA = TMIN to TMAX, VDD = 2.7 V to 5.5 V, unless otherwise noted.) Parameter. Min. Typ. Max. Unit

AD7814–SPECIFICATIONS1 (TA = TMIN to TMAX, VDD = 2.7 V to 5.5 V, unless otherwise noted.) Parameter Min Typ Max Unit

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AD7814–SPECIFICATIONS1 (TA = TMIN to TMAX, VDD = 2.7 V to 5.5 V, unless otherwise noted.) Parameter Min Typ Max Unit Test Conditions/Comments
TEMPERATURE SENSOR AND ADC Accuracy ±2.0 °C TA = 0°C to 85°C. VDD = 3 V to 5.5 V2 ±2.5 °C TA = –40°C to 0°C. VDD = 3 V to 5.5 V2 ±2.0 ±3.5 °C TA = –55°C to +125°C. VDD = 3 V to 5.5 V Resolution 10 Bits Update Rate, tR 400 µs Temperature Conversion Time 25 µs SUPPLIES Supply Voltage 2.7 5.5 V For Specified Performance Supply Current Normal Mode 250 400 µA Shutdown Mode (VDD = 5 V) 1.23 3 µA Shutdown Mode (VDD = 3 V) 0.43 1 µA Power Dissipation 80 µW VDD = 3 V. Using Normal Mode Power Dissipation VDD = 3 V. Using Shutdown Mode 1 sps 3.7 µW 10 sps 3.9 µW 100 sps 5.8 µW DIGITAL INPUT3 Input High Voltage, VIH 2.4 V Input Low Voltage, VIL 0.8 V Input Current, I ± IN 1 µA VIN = 0 V to VDD Input Capacitance, CIN 10 pF All Digital Inputs DIGITAL OUTPUT3 Output High Voltage, VOH VDD – 0.3 V ISOURCE = ISINK = 200 µA Output Low Voltage, VOL 0.4 V IOL = 200 µA Output Capacitance, COUT 50 pF NOTES 1All specifications apply for –55°C to +125°C unless otherwise stated. 2For VDD = 2.7 V to 3 V and TA = –40°C to +85°C, the typical temperature error is ±2°C. 3Guaranteed by design and characterization, not production tested. Specifications subject to change without notice.
TIMING CHARACTERISTICS1, 2, 3 (TA = TMIN to TMAX, VDD = 2.7 V to 5.5 V, unless otherwise noted.) Parameter Limit Unit Comments
t1 0 ns min CS to SCLK Setup Time t2 50 ns min SCLK High Pulse Width t3 50 ns min SCLK Low Pulse Width t 4 4 35 ns max Data Access Time After SCLK Falling Edge t5 20 ns min Data Setup Time Prior to SCLK Rising Edge t6 0 ns min Data Hold Time After SCLK Rising Edge t7 0 ns min CS to SCLK Hold Time t 4 8 40 ns max CS to DOUT High Impedance NOTES 1Guaranteed by design and characterization, not production tested. 2All input signals are specified with tr = tf = 5 ns (10% to 90% of VDD) and timed from a voltage level of 1.6 V. 3See Figure 2. 4Measured with the load circuit of Figure 1. Specifications subject to change without notice. –2– REV. E Document Outline FEATURES FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION PRODUCT HIGHLIGHTS SPECIFICATIONS TIMING CHARACTERISTICS ABSOLUTE MAXIMUM RATINGS ORDERING GUIDE PIN FUNCTION DESCRIPTIONS PIN CONFIGURATIONS CIRCUIT INFORMATION CONVERTER DETAILS TEMPERATURE VALUE REGISTER SERIAL INTERFACE Read Operation Write Operation MICROPROCESSOR INTERFACING AD7814 to MC68HC11 Interface AD7814 to 8051 Interface AD7814 to PIC16C6x/7x Interface AD7814 to ADSP-21xx Interface MOUNTING THE AD7814 SUPPLY DECOUPLING OUTLINE DIMENSIONS Revision History