Datasheet LTC4071 (Analog Devices) - 6

link to page 8 LTC4071
PIN FUNCTIONS NTCBIAS (Pin 1):
NTC Bias Pin. Connect a resistor from effective float voltage. Refer to Table 1 for the effective NTCBIAS to NTC, and a thermistor from NTC to GND. float voltage. Float NTCBIAS when not in use. Minimize parasitic capaci-
LBSEL (Pin 5):
Low Battery Disconnect Select Pin. tance on this pin. Connect LBSEL to GND to select a low battery discon-
NTC (Pin 2):
Input to the Negative Temperature Coefficient nect level of 3.2V, connect LBSEL to VCC to select a low Thermistor Monitoring Circuit. The NTC pin connects to a battery disconnect level of 2.7V. Do not float. negative temperature coefficient thermistor which is typi-
GND (Pin 6, Exposed Pad Pin 9):
Ground. The exposed cally co-packaged with the battery to determine the tem- package pad has no internal electrical connection but perature of the battery. If the battery temperature is too must be connected to PCB ground for maximum heat high, the float voltage is reduced. Connect a low drift bias transfer. resistor from NTCBIAS to NTC and a thermistor from NTC to GND. When not in use, connect NTC to VCC. Minimize
BAT (Pin 7):
Battery Pin. Battery charge current is sourced parasitic capacitance on this pin. from VCC through this pin when an external supply is present. BAT supplies current to V
ADJ (Pin 3):
Float Voltage Adjust Pin. Connect ADJ to CC from this pin when no other source of power is available. If BAT falls below GND to program 4.0V float voltage. Disconnect ADJ to V program 4.1V float voltage. Connect ADJ to V LBD this pin disconnects the battery from VCC protecting CC to pro- the battery from discharge by the load when no external gram 4.2V float voltage. The float voltage is also adjusted power supply is present. by the NTC thermistor.
V HBO (Pin 4):
High Battery Monitor Output (Active High).
CC (Pin 8):
Input Supply Pin. Attach system load to this pin. The input supply voltage is regulated to 4.0V, 4.1V, HBO is a CMOS output that indicates that the battery is or 4.2V depending on the ADJ pin state (see the ADJ pin almost fully charged and current is being shunted away description for more detail). This pin can sink up to 50mA from VCC. This pin is driven high when VCC rises to within in order to keep the voltage regulation within accuracy VHBTH of the effective float voltage, VFLOAT_EFF. The abso- limits. Decouple to GND with a capacitor, C lute value of this threshold depends on ADJ and NTC IN, of at least 0.1µF, use a larger decoupling cap to handle high peak both of which affect the float voltage. HBO is driven low load currents. when VCC falls by more than (VHBTH + VHBHY) below the Rev. D 6 For more information www.analog.com Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Operation Applications Information Package Description Revision History Typical Application Related Parts