Datasheet SRK1001 (STMicroelectronics) - 2

SRK1001 Block diagram and pin connection 1 Block diagram and pin connection Figure 1. Internal block diagram DVS HV CLAMP COMPARATORS TIMER ON ZCD TON ADAPTIVE DIS/SYNC CONTROL TOFF CONTROL LOGIC VAUX DRIVER POWER GD MANAGEMENT & SWITCH OVER VCC GND Figure 2. Pin connections (top view) DIS/SYNC 1 8 TON GD 2 7 TOFF GND 3 6 VAUX VCC 4 5 DVS SO8 Table 1. Pin functions N. Name Function
This pin has two functions: disable and synchronization input. • Asynchronous turn-off of SR MOSFET always occurs after DIS pin voltage shows a positive rising edge and the synchronous rectification stays disabled as long as it remains at the high level. If the DIS pin DIS/ voltage stays high for at least 4 switching cycles, the device enters low consumption mode. 1 SYNC • Synchronization function requires that no external capacitor must be mounted between TON pin and GND, so that SR MOSFET turn-off is accomplished by the positive rising edge of the applied SYNC signal or when triggered by ZCD comparator output. This pin is pulled high by internal current source (5 µA); if not used, it must be grounded. Gate driver output. Totem pole output stage is able to drive power MOSFET with high peak current levels. To 2 GD avoid excessive gate voltages in case the device is supplied with a high VCC, the high level voltage of this pin is clamped to about 11.5 V. The pin must be connected directly to the SR MOSFET gate terminal. Return of the device bias current and return of the gate drive current. Route this pin close to the source terminal 3 GND of synchronous rectifier MOSFET.
DS13155
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Rev 1 page 2/27
Document Outline 1 Block diagram and pin connection 2 Maximum ratings 3 Typical application schematic 4 Electrical characteristics 5 Operation description 5.1 Drain voltage sensing 5.2 Turn-on 5.3 Minimum TON programming 5.4 Adaptive turn-off and TIMER 5.4.1 Fixed frequency mixed DCM/CCM operation 5.4.2 QR operation (with valley skipping) 5.4.3 Fixed frequency DCM operation 5.4.4 Variable frequency CCM operation 5.5 Minimum TOFF programming 5.6 Start-up phase 5.7 Low consumption mode operation: sleep-mode, burst mode, disable state 5.8 DIS/SYNC pin functions 5.9 VAUX pin operation in CC regulation 5.9.1 Example for parameter calculations 5.10 Operation in CC regulation and short circuit 5.11 Adaptive gate drive 6 Layout guidelines 7 Package mechanical data Revision history