Datasheet 1EDN7550U (Infineon) - 6

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EiceDRIVER™ 1EDN7550 and 1EDN8550 Single-channel EiceDRIVER™ gate-drive IC with true differential inputs Functional description 3.1.1 Common mode input range
There are two effects limiting the common-mode input range, i.e. the maximum allowed voltage difference between controller outputs PWM/SGND and driver reference GND: the circuit and technology-related input voltage restrictions and the finite common-mode rejection in the input signal path due to asymmetries. The static voltage range at the input pins is limited to + 6 / - 7 V to guarantee accurate linear operation of the input circuitry. Taking into account the proposed DC voltage divider ratio, this translates to a static common- mode (CMR) range of + 72 / - 84 V. CMR is increased even further for high-frequency common-mode voltages ("ringing"). Then the maximum input voltage ratings ( ± 10 V) together with the frequency-dependence of the voltage-divider ratio result in an extended dynamic CMR as high as ± 150 V. The second limitation results from the fact that any imbalance in the signal path converts a common-mode to a differential signal. To utilize the full CMR as calculated above, the high accuracy of the trimmed on-chip network must not be affected by the external voltage divider resistors. This condition is easily fulfilled when choosing Rin1 and Rin2 with 0.1% tolerance; resistors with only 1% accuracy, however, would reduce the common-mode range significantly to ± 40 V.
3.2 Driver outputs
The rail-to-rail driver output stage realized with complementary MOS transistors is able to provide a typical 4 A sourcing and 8 A sinking current. The low on-resistance coming together with high driving current is particularly beneficial for fast switching of very large MOSFETs. With a Ron of 0.85 Ω for the sourcing pMOS and 0.35 Ω for the sinking nMOS transistor the driver can in most applications be considered to behave like an ideal switch. The p-channel sourcing transistor allows real rail-to-rail behavior without suffering from the source-follower’s voltage drop typical for n-channel output stages. In case of floating inputs or insufficient supply voltage the driver output is actively clamped to the “low” level (GND).
3.3 Supply voltage and Undervoltage Lockout (UVLO)
The Undervoltage Lockout function ensures that the output can be switched only, if the supply voltage VDD exceeds the UVLO threshold voltage. Thus it can be guaranteed that the switch transistor is not operated with a driving voltage too low to achieve a complete and fast transition to the "on" state; this avoids excessive power dissipation (see
Table 3
).
Table 3 Logic table ΔV Rin UVLO OUT_SRC OUT_SNK
x active
1)
high impedance L L
2)
inactive
3)
high impedance L H
4)
inactive
3)
H high impedance EiceDRIVER™ 1EDNx550 is available in two different packages; the SOT23 version offers 2 UVLO threshold levels to support switches with a broad range of threshold voltages • 1EDN7550 with a typical UVLO threshold of 4.2 V (0.3 V hysteresis) • 1EDN8550 with a typical UVLO threshold of 8 V (1 V hysteresis) In addition, the high maximum VDD of 20 V makes the driver family well suited for a broad variety of power switch types. 1 VDD < UVLOoff 2 ΔVRin < ΔVRinL 3 VDD > UVLOon 4 ΔVRin > ΔVRinH Datasheet 6 Rev. 2.2 2019-12-09 Document Outline Features Description Table of contents 1 Pin configuration and description 2 Block diagram 3 Functional description 3.1 Differential input 3.1.1 Common mode input range 3.2 Driver outputs 3.3 Supply voltage and Undervoltage Lockout (UVLO) 4 Electrical characteristics and parameters 4.1 Absolute maximum ratings 4.2 Thermal characteristics 4.3 Operating range 4.4 Electrical characteristics 4.5 Timing diagram 5 Typical characteristics 6 Typical applications 6.1 Switches with Kelvin source connection (4-pin packages) 6.2 Applications with significant parasitic PCB-inductances 6.3 Switches with bipolar gate drive 6.4 High-side switches 7 Layout guidelines 8 Package information 8.1 PG-SOT23-6 package 8.2 PG-TSNP-6 package 9 Device numbers and markings Revision history Disclaimer