Datasheet LTC7060 (Analog Devices) - 8
| 制造商 | Analog Devices |
| 描述 | 100V Half Bridge Driver with Floating Grounds and Programmable Dead-Time |
| 页数 / 页 | 18 / 8 — BLOCK DIAGRAM. TIMING DIAGRAM |
| 文件格式/大小 | PDF / 1.4 Mb |
| 文件语言 | 英语 |
BLOCK DIAGRAM. TIMING DIAGRAM
该数据表的模型线
文件文字版本
LTC7060
BLOCK DIAGRAM
FLT DT BST DELAY TG UVLO DRIVER VCC UVLO OVLO SW EN DRIVER LEVEL LOGIC SHIFTER 2MΩ 1.2V LEVEL 4.5V SHOOT- SHIFTER 1.0V THROUGH BGVCC PROTECTION 48k PWM BG DRIVER 42k UVLO 3.1V BGRTN SGND 7060 BD
TIMING DIAGRAM
EN VENF ENR V VIL(TG) PWM VIL(BG) VIL(BG) 90% 90% 10% 10% TG r(TG) t tf(TG) BG 90% 10% tPL(EN) tr(BG) PHL(BG) t PLH(TG) t tPH(EN) tPLH(BG) f(BG) t PHL(BG) t tPHL(TG) 7060 TD Rev. 0 8 For more information www.analog.com Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Order Information Pin Configuration Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Timing Diagram Operation Applications InformatioN Typical Applications Package Description Typical Application Related Parts
BLOCK DIAGRAM
FLT DT BST DELAY TG UVLO DRIVER VCC UVLO OVLO SW EN DRIVER LEVEL LOGIC SHIFTER 2MΩ 1.2V LEVEL 4.5V SHOOT- SHIFTER 1.0V THROUGH BGVCC PROTECTION 48k PWM BG DRIVER 42k UVLO 3.1V BGRTN SGND 7060 BD
TIMING DIAGRAM
EN VENF ENR V VIL(TG) PWM VIL(BG) VIL(BG) 90% 90% 10% 10% TG r(TG) t tf(TG) BG 90% 10% tPL(EN) tr(BG) PHL(BG) t PLH(TG) t tPH(EN) tPLH(BG) f(BG) t PHL(BG) t tPHL(TG) 7060 TD Rev. 0 8 For more information www.analog.com Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Order Information Pin Configuration Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Timing Diagram Operation Applications InformatioN Typical Applications Package Description Typical Application Related Parts