Datasheet PSMN0R9-25YLC (Nexperia) - 9
| 制造商 | Nexperia |
| 描述 | N-channel 25 V 0.99 mΩ logic level MOSFET in LFPAK using NextPower technology |
| 页数 / 页 | 15 / 9 — Nexperia. PSMN0R9-25YLC. N-channel 25 V 0.99 mΩ logic level MOSFET in … |
| 修订版 | 02042018 |
| 文件格式/大小 | PDF / 933 Kb |
| 文件语言 | 英语 |
Nexperia. PSMN0R9-25YLC. N-channel 25 V 0.99 mΩ logic level MOSFET in LFPAK using NextPower technology
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Nexperia PSMN0R9-25YLC N-channel 25 V 0.99 mΩ logic level MOSFET in LFPAK using NextPower technology
003a a f 526 003a a f 527 5 2 R 2.4 2.6 DS on a (m) 4 VGS=4.5V 1.5 3 VGS (V) = 2.8 10V 1 2 3.0 3.5 0.5 1 10 4.5 0 0 0 25 50 75 100 -60 0 60 120 180 I D (A) Tj ( C)
Fig 12. Drain-source on-state resistance as a function Fig 13. Normalized drain-source on-state resistance of drain current; typical values factor as a function of junction temperature
003a a f 533 10 VDS VGS (V) ID 8 VGS(pl) 5V 6 VGS(th) VDS = 20V VGS 4 Q 12V GS1 QGS2 Q Q GS GD 2 QG(tot) 003aaa508 0 0 30 60 90 120 QG (nC)
Fig 14. Gate charge waveform definitions Fig 15. Gate-source voltage as a function of gate charge; typical values
PSMN0R9-25YLC All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2017. All rights reserved
Product data sheet Rev. 2 — 4 July 2011 9 of 15
Document Outline 1. Product profile 1.1 General description 1.2 Features and benefits 1.3 Applications 1.4 Quick reference data 2. Pinning information 3. Ordering information 4. Limiting values 5. Thermal characteristics 6. Characteristics 7. Package outline 8. Revision history 9. Legal information 9.1 Data sheet status 9.2 Definitions 9.3 Disclaimers 9.4 Trademarks 10. Contact information 11. Contents
003a a f 526 003a a f 527 5 2 R 2.4 2.6 DS on a (m) 4 VGS=4.5V 1.5 3 VGS (V) = 2.8 10V 1 2 3.0 3.5 0.5 1 10 4.5 0 0 0 25 50 75 100 -60 0 60 120 180 I D (A) Tj ( C)
Fig 12. Drain-source on-state resistance as a function Fig 13. Normalized drain-source on-state resistance of drain current; typical values factor as a function of junction temperature
003a a f 533 10 VDS VGS (V) ID 8 VGS(pl) 5V 6 VGS(th) VDS = 20V VGS 4 Q 12V GS1 QGS2 Q Q GS GD 2 QG(tot) 003aaa508 0 0 30 60 90 120 QG (nC)
Fig 14. Gate charge waveform definitions Fig 15. Gate-source voltage as a function of gate charge; typical values
PSMN0R9-25YLC All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2017. All rights reserved
Product data sheet Rev. 2 — 4 July 2011 9 of 15
Document Outline 1. Product profile 1.1 General description 1.2 Features and benefits 1.3 Applications 1.4 Quick reference data 2. Pinning information 3. Ordering information 4. Limiting values 5. Thermal characteristics 6. Characteristics 7. Package outline 8. Revision history 9. Legal information 9.1 Data sheet status 9.2 Definitions 9.3 Disclaimers 9.4 Trademarks 10. Contact information 11. Contents