Product Brief AVR-DA (Microchip)
| 制造商 | Microchip |
| 描述 | AVR-DA family of microcontrollers is using the AVR CPU with hardware multiplier, running at up to 24 MHz, with 32/64/128 KB of Flash, 4/8/16 KB of SRAM, and 512 bytes of EEPROM in 28-, 32-, 48-or 64-pin packages |
| 页数 / 页 | 15 / 1 — AVR-DA. Product Brief. Introduction. Features |
| 文件格式/大小 | PDF / 207 Kb |
| 文件语言 | 英语 |
AVR-DA. Product Brief. Introduction. Features
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文件文字版本
AVR-DA Product Brief Introduction
The AVR-DA family of microcontrollers is using the AVR® CPU with hardware multiplier, running at up to 24 MHz, with 32/64/128 KB of Flash, 4/8/16 KB of SRAM, and 512 bytes of EEPROM in 28-, 32-, 48- or 64-pin packages. The family uses the latest technologies from Microchip with a flexible and low-power architecture including Event System, accurate analog features, advanced digital peripherals and Peripheral Touch Controller (PTC).
Features
• AVR® CPU: – Running at up to 24 MHz – Single-cycle I/O access – Two-level interrupt controller – Two-cycle hardware multiplier – Supply voltage range: 1.8V to 5.5V • Memories: – 32/64/128 KB In-system self-programmable Flash memory – 4/8/16 KB SRAM – 512B EEPROM – 32B of user row in nonvolatile memory that can keep data during chip-erase and be programmed while the device is locked – Write/erase endurance • Flash 10,000 cycles • EEPROM 100,000 cycles – Data retention: 40 years at 55°C • System: – Power-on Reset (POR) circuit – Brown-out Detector (BOD) – Clock options • High-precision internal High-Frequency Oscillator with selectable frequency up to 24 MHz (OSCHF) – Auto-tuning for improved internal oscillator accuracy • Internal PLL up to 48 MHz for high-frequency operation of Timer/Counter type D (PLL) • 32.768 kHz ultra low-power internal oscillator (OSC32K) • 32.768 kHz external crystal oscillator (XOSC32K) • External clock input – Single-pin Unified Program and Debug Interface (UPDI) – Three sleep modes • Idle, with all peripherals running for immediate wake-up • Standby – Configurable operation of selected peripherals • Power-Down with full data retention © 2020 Microchip Technology Inc.
Product Brief
DS40002164A-page 1 Document Outline Introduction Features AVR-DA Family Overview 1. Memory Overview 2. Peripheral Overview Table of Contents 1. Block Diagram 2. Pinout 2.1. 28-Pin SPDIP, SSOP and SOIC 2.2. 32-Pin VQFN and TQFP 2.3. 48-Pin VQFN and TQFP 2.4. 64-Pin VQFN and TQFP 3. I/O Multiplexing and Considerations 3.1. I/O Multiplexing The Microchip Website Product Change Notification Service Customer Support Microchip Devices Code Protection Feature Legal Notice Trademarks Quality Management System Worldwide Sales and Service
The AVR-DA family of microcontrollers is using the AVR® CPU with hardware multiplier, running at up to 24 MHz, with 32/64/128 KB of Flash, 4/8/16 KB of SRAM, and 512 bytes of EEPROM in 28-, 32-, 48- or 64-pin packages. The family uses the latest technologies from Microchip with a flexible and low-power architecture including Event System, accurate analog features, advanced digital peripherals and Peripheral Touch Controller (PTC).
Features
• AVR® CPU: – Running at up to 24 MHz – Single-cycle I/O access – Two-level interrupt controller – Two-cycle hardware multiplier – Supply voltage range: 1.8V to 5.5V • Memories: – 32/64/128 KB In-system self-programmable Flash memory – 4/8/16 KB SRAM – 512B EEPROM – 32B of user row in nonvolatile memory that can keep data during chip-erase and be programmed while the device is locked – Write/erase endurance • Flash 10,000 cycles • EEPROM 100,000 cycles – Data retention: 40 years at 55°C • System: – Power-on Reset (POR) circuit – Brown-out Detector (BOD) – Clock options • High-precision internal High-Frequency Oscillator with selectable frequency up to 24 MHz (OSCHF) – Auto-tuning for improved internal oscillator accuracy • Internal PLL up to 48 MHz for high-frequency operation of Timer/Counter type D (PLL) • 32.768 kHz ultra low-power internal oscillator (OSC32K) • 32.768 kHz external crystal oscillator (XOSC32K) • External clock input – Single-pin Unified Program and Debug Interface (UPDI) – Three sleep modes • Idle, with all peripherals running for immediate wake-up • Standby – Configurable operation of selected peripherals • Power-Down with full data retention © 2020 Microchip Technology Inc.
Product Brief
DS40002164A-page 1 Document Outline Introduction Features AVR-DA Family Overview 1. Memory Overview 2. Peripheral Overview Table of Contents 1. Block Diagram 2. Pinout 2.1. 28-Pin SPDIP, SSOP and SOIC 2.2. 32-Pin VQFN and TQFP 2.3. 48-Pin VQFN and TQFP 2.4. 64-Pin VQFN and TQFP 3. I/O Multiplexing and Considerations 3.1. I/O Multiplexing The Microchip Website Product Change Notification Service Customer Support Microchip Devices Code Protection Feature Legal Notice Trademarks Quality Management System Worldwide Sales and Service