Datasheet DN3545 (Microchip)

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DN3545 N-Channel Depletion-Mode Vertical DMOS FET Features General Description
• High Input Impedance The DN3545 Depletion-mode normally-on transistor • Low Input Capacitance uses an advanced vertical Diffusion Metal Oxide Semi- • Fast Switching Speeds conductor (DMOS) structure and a well-proven silicon- gate manufacturing process. This combination pro- • Low On-Resistance duces a device with the power-handling capabilities of • Free from Secondary Breakdown bipolar transistors and the high-input impedance and • Low Input and Output Leakage positive-temperature coefficient inherent in Metal- Oxide Semiconductor (MOS) devices. Characteristic of
Applications
all MOS structures, this device is free from thermal runaway and thermally induced secondary breakdown. • Normally-On Switches Vertical DMOS Field-Effect Transistors (FETs) are ide- • Solid-State Relays ally suited to a wide range of switching and amplifying • Converters applications where very low threshold voltage, high • Linear Amplifiers breakdown voltage, high input impedance, low input • Constant-Current Sources capacitance and fast switching speeds are desired. • Power Supply Circuits • Telecommunications
Package Types 3-lead TO-92 3-lead SOT-89
(Top view) (Top view)
DRAIN DRAIN SOURCE SOURCE DRAIN GATE GATE
See Table 3-1 and Table 3-2 for pin information.  2018 Microchip Technology Inc. DS20005438A-page 1 Document Outline 1.0 Electrical Characteristics 2.0 Typical Performance Curves FIGURE 2-1: Output Characteristics. FIGURE 2-2: Transconductance vs. Drain Current. FIGURE 2-3: Maximum Rated Safe Operating Area. FIGURE 2-4: Saturation Characteristics. FIGURE 2-5: Power Dissipation vs. Ambient Temperature. FIGURE 2-6: Thermal Response Characteristics. FIGURE 2-7: BVDSS Variation with Temperature. FIGURE 2-8: Transfer Characteristics. FIGURE 2-9: Capacitance vs. Drain-to- Source Voltage. FIGURE 2-10: On-Resistance vs. Drain Current. FIGURE 2-11: VGS(th) and RDS(ON) Variation with Temperature. FIGURE 2-12: Gate Drive Dynamic Characteristics. 3.0 Pin Description TABLE 3-1: 3-lead TO-92 Pin Function Table TABLE 3-2: 3-lead SOT-89 Pin Function Table 4.0 Functional Description FIGURE 4-1: Switching Waveforms and Test Circuit. TABLE 4-1: Product Summary 5.0 Packaging Information 5.1 Package Marking Information AMERICAS Corporate Office Atlanta Austin, TX Boston Chicago Dallas Detroit Houston, TX Indianapolis Los Angeles Raleigh, NC New York, NY San Jose, CA Canada - Toronto ASIA/PACIFIC Australia - Sydney China - Beijing China - Chengdu China - Chongqing China - Dongguan China - Guangzhou China - Hangzhou China - Hong Kong SAR China - Nanjing China - Qingdao China - Shanghai China - Shenyang China - Shenzhen China - Suzhou China - Wuhan China - Xian China - Xiamen China - Zhuhai ASIA/PACIFIC India - Bangalore India - New Delhi India - Pune Japan - Osaka Japan - Tokyo Korea - Daegu Korea - Seoul Malaysia - Kuala Lumpur Malaysia - Penang Philippines - Manila Singapore Taiwan - Hsin Chu Taiwan - Kaohsiung Taiwan - Taipei Thailand - Bangkok Vietnam - Ho Chi Minh EUROPE Austria - Wels Denmark - Copenhagen Finland - Espoo France - Paris Germany - Garching Germany - Haan Germany - Heilbronn Germany - Karlsruhe Germany - Munich Germany - Rosenheim Israel - Ra’anana Italy - Milan Italy - Padova Netherlands - Drunen Norway - Trondheim Poland - Warsaw Romania - Bucharest Spain - Madrid Sweden - Gothenberg Sweden - Stockholm UK - Wokingham