Datasheet ADAR1000 (Analog Devices) - 5

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Data Sheet ADAR1000 Parameter Test Conditions/Comments Min Typ Max Unit
Noise Figure Maximum gain setting Nominal Bias Setting 9.5 GHz 8 dB 11.5 GHz 8 dB 14 GHz 9 dB Low Bias Setting 9.5 GHz 9 dB 11.5 GHz 10 dB 14 GHz 11 dB Channel to Channel Isolation4 40 dB RF_IO to Receive Isolation 60 dB Input Return Loss −10 dB Output Return Loss RF_IO pin −12 dB TEMPERATURE SENSOR Range −40 +85 °C Slope 0.8 LSB/°C Nominal Analog-to-Digital Converter Power-on reset (POR) mode (transmit 145 Decimal (ADC) Output and receive not enabled), TA = 25°C Resolution 8 Bits TRANSMIT AND RECEIVE SWITCHING TX_LOAD, RX_LOAD, and TR pins Transmit and Receive Switching Time From TR at 50% to RF at 90% 180 ns Phase and Gain Switching Time From TX_LOAD or RX_LOAD at 50% to 20 ns RF at 90% POWER DETECTOR DET1, DET2, DET3, and DET4 pins RF Input Power Range 11.5 GHz −20 +10 dBm Input Return Loss −10 dB Nominal ADC Output Code Input power (PIN) = 0 dBm, 11.5 GHz 60 Decimal Resolution 8 Bits POWER AMPLIFIER (PA) DIGITAL-TO-ANALOG PA_BIAS1, PA_BIAS2, PA_BIAS3, and CONVERTER (DAC) PA_BIAS4 pins Resolution 8 Bits Voltage Range −4.8 to 0 V Source and Sink Current −10 to mA +10 Off to On Switching Time From TR or CSB at 50% to VOUT at 90%, 60 ns VOUT from −1 V to −2 V, 1 nF CLOAD On to Off Switching Time From TR or CSB at 50% to VOUT at 10%, 60 ns VOUT from −1 V to −2 V, 1 nF CLOAD LOW NOISE AMPLIFIER (LNA) DAC LNA_BIAS pin Resolution 8 Bits Voltage Range −4.8 to 0 V Source and Sink Current −10 to+10 mA Off to On Switching Time From TR or CSB at 50% to VOUT at 90%, 60 ns VOUT from −2 V to −1 V, 1 nF CLOAD On to Off Switching Time From TR or CSB at 50% to VOUT at 10%, 60 ns VOUT from −1 V to −2 V, 1 nF CLOAD TRANSMIT AND RECEIVE MODULE CONTROL TR_SW_POS, TR_SW_NEG, TR_POL pins Voltage Range TR_SW_NEG, TR_POL −4.8 to 0 V TR_SW_POS 0 to 3.2 V Off to On Switching Time From TR or CSB at 50% to VOUT at 90% 15 ns On to Off Switching Time From TR or CSB at 50% to VOUT at 10% 15 ns Rev. A | Page 5 of 65 Document Outline Features Applications General Description Functional Block Diagram Revision History Specifications Timing Specifications Timing Diagrams SPI Block Write Mode SPI Write All Mode Absolute Maximum Ratings Thermal Resistance ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics Theory of Operation RF Path Phase and Gain Control Power Detectors External Amplifier Bias DACs External Switch Control Transmit and Receive Control RF Subcircuit Bias Control and Enables ADC Operation Chip Addressing Memory Access Calibration Applications Information Gain Control Registers Switched Attenuator Control Phase Control Registers Transmit and Receive Subcircuit Control TR_SOURCE = 1 (TR Pin Control) TR_SOURCE = 0 (SPI Control) Transmit and Receive Switch Driver Control PA Bias Output Control LNA Bias Output Control Transmit/Receive Delay Control Transmit and Receive Mode Switching SPI Programming Example Powering the ADAR1000 Register Map Register Descriptions Outline Dimensions Ordering Guide