Datasheet 5P35021 (IDT) - 7
| 制造商 | IDT |
| 描述 | Programmable VersaClock Clock Generator |
| 页数 / 页 | 46 / 7 — Table 7. DFC Function Priority. OE1_fun_sel. OE3_fun_sel. DFC_EN bit … |
| 修订版 | 20191004 |
| 文件格式/大小 | PDF / 1.0 Mb |
| 文件语言 | 英语 |
Table 7. DFC Function Priority. OE1_fun_sel. OE3_fun_sel. DFC_EN bit (W32[4]). (W30[6:5]). (W30[3:2]). SCL_DFC1. DFC[1:0]. Notes
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link to page 7 5P35021 Datasheet
Table 7. DFC Function Priority OE1_fun_sel OE3_fun_sel DFC_EN bit (W32[4]) (W30[6:5]) (W30[3:2]) SCL_DFC1 DFC[1:0] Notes
0 x x x 0 DFC disable 1 11 (DFC) 00–10 (DFC) x [0,OE1] One-pin DFC–OE1 Two-pin DFC–OE3, 1 11 (DFC) 11 (DFC) x [OE3,OE1] OE1 1 1 00–10 11 x Not permitted Not supported [SCL_DFC1, I2C pin as DFC 1 00–10 00–10 0 SDA_DFC0] control pins mode 1 00–10 00–10 1 W30[1:0] I2C control DFC mode 1 5P35021 has only OE1 pin for DFC function hardware pin selection. For OE2/OE3 two pins DFC control, use 5P35023 24-QFN package device.
DFC Function Programming
▪ Register B63b3:2 selects DFC00–DFC11 configuration. ▪ Byte16–19 are the registers for PLL2 VCO setting, based on B63b3:2 configuration selection, the data write to B16–19 will be stored in selected configuration OTP memory. ▪ Refer to DFC Function Priority table. Select proper control pin(s) to activate DFC function. ▪ Note the DFC function can also be controlled by I2C access.
PPS – Proactive Power Saving Function
PPS (Proactive Power Saving) is an IDT patented unique design for the clock generator that proactively detects end device power down state and then switches output clocks between normal operation clock frequency and low power mode 32kHz clock that only consumes < 2μA current. The system could save power when the device goes into power down or sleep mode. The PPS function diagram is shown as below.
Figure 3. PPS Function Block Diagram
PPS Control Power I2C Logic Down & Control Logic Low Power DCO XOUT Xtal Logic Oscillator Xtal XIN Oscil ator PLL MHz / kHz Switching ©2019 Integrated Device Technology, Inc. 7 October 4, 2019 Document Outline Description Typical Applications Key Specifications Features Output Features Block Diagram Pin Assignments Figure 1. Pin Assignments for 3 x 3 mm 20-VFQFPN Package – Top View Pin Descriptions Table 1. Pin Descriptions Power Group Table 2. Power Group Output Sources Table 3. Output Source Table 4. Output Source Selection Register Settings Table 5. DIFF1 Output Table 6. DIFF2 Output Device Features and Functions DFC – Dynamic Frequency Control Figure 2. DFC Function Block Diagram Table 7. DFC Function Priority DFC Function Programming PPS – Proactive Power Saving Function Figure 3. PPS Function Block Diagram Figure 4. PPS Assertion/Deassertion Timing Chart PPS Function Programming Timer Function Description Figure 5. Timer Functions OE Pin Function Table 8. OE Pin Functions Table 9. OE Pin Function Summary Table 10. PD# Priority Reference Input and Selection Crystal Input (X1/X2) Table 11. Programmable Tuning Caps Spread Spectrum Analog Spread Spectrum Digital Spread Spectrum Figure 6. Digital Spread Spectrum VBAT Table 12. VBAT Switching Threshold ORT–VCO Overshoot Reduction Technology PLL Features and Descriptions Table 13. Output 1 Divider Table 14. Output 2, 4, and 5 Divider Table 15. Output 3 Divider Output Clock Test Conditions Figure 7. LVCMOS Output Test Conditions Figure 8. LP-HCSL Output Test Conditions Absolute Maximum Ratings Table 16. Absolute Maximum Ratings Recommended Operating Conditions Table 17. Recommended Operating Conditions Electrical Characteristics Table 18. Input Capacitance, LVCMOS Output Impedance, and Internal Pull-down Resistance Table 19. Crystal Characteristics Table 20. DC Electrical Characteristics (Industrial)1,2 Table 21. DC Electrical Characteristics (Automotive)1,2 Table 22. Input Parameters1,2 Table 23. Power Consumption of 32.768kHz Output Only Operation Table 24. DC Electrical Characteristics – 3.3V LVCMOS Table 25. DC Electrical Characteristics – 2.5V LVCMOS Table 26. DC Electrical Characteristics – 1.8V LVCMOS Table 27. Electrical Characteristics – DIF 0.7V LPHCSL Differential Outputs Table 28. Electrical Characteristics – LVDS Table 29. Electrical Characteristics – LVPECL Figure 9. Output Differential Voltage Swing AC Electrical Characteristics Table 30. AC Electrical Characteristics PCI Express Jitter Specifications Table 31. PCI Express Jitter Specifications Spread Spectrum Generation Specifications Table 32. Spread Spectrum Generation Specifications I2C Bus Characteristics Table 33. I2C Bus DC Characteristics Table 34. I2C Bus AC Characteristics I2C Mode Operations Figure 10. I2C Slave Read and Write Cycle Sequencing Glossary of Features Table 35. Glossary of Features Package Outline Drawings Marking Diagrams (industrial) Marking Diagrams (automotive) Ordering Information Revision History
Table 7. DFC Function Priority OE1_fun_sel OE3_fun_sel DFC_EN bit (W32[4]) (W30[6:5]) (W30[3:2]) SCL_DFC1 DFC[1:0] Notes
0 x x x 0 DFC disable 1 11 (DFC) 00–10 (DFC) x [0,OE1] One-pin DFC–OE1 Two-pin DFC–OE3, 1 11 (DFC) 11 (DFC) x [OE3,OE1] OE1 1 1 00–10 11 x Not permitted Not supported [SCL_DFC1, I2C pin as DFC 1 00–10 00–10 0 SDA_DFC0] control pins mode 1 00–10 00–10 1 W30[1:0] I2C control DFC mode 1 5P35021 has only OE1 pin for DFC function hardware pin selection. For OE2/OE3 two pins DFC control, use 5P35023 24-QFN package device.
DFC Function Programming
▪ Register B63b3:2 selects DFC00–DFC11 configuration. ▪ Byte16–19 are the registers for PLL2 VCO setting, based on B63b3:2 configuration selection, the data write to B16–19 will be stored in selected configuration OTP memory. ▪ Refer to DFC Function Priority table. Select proper control pin(s) to activate DFC function. ▪ Note the DFC function can also be controlled by I2C access.
PPS – Proactive Power Saving Function
PPS (Proactive Power Saving) is an IDT patented unique design for the clock generator that proactively detects end device power down state and then switches output clocks between normal operation clock frequency and low power mode 32kHz clock that only consumes < 2μA current. The system could save power when the device goes into power down or sleep mode. The PPS function diagram is shown as below.
Figure 3. PPS Function Block Diagram
PPS Control Power I2C Logic Down & Control Logic Low Power DCO XOUT Xtal Logic Oscillator Xtal XIN Oscil ator PLL MHz / kHz Switching ©2019 Integrated Device Technology, Inc. 7 October 4, 2019 Document Outline Description Typical Applications Key Specifications Features Output Features Block Diagram Pin Assignments Figure 1. Pin Assignments for 3 x 3 mm 20-VFQFPN Package – Top View Pin Descriptions Table 1. Pin Descriptions Power Group Table 2. Power Group Output Sources Table 3. Output Source Table 4. Output Source Selection Register Settings Table 5. DIFF1 Output Table 6. DIFF2 Output Device Features and Functions DFC – Dynamic Frequency Control Figure 2. DFC Function Block Diagram Table 7. DFC Function Priority DFC Function Programming PPS – Proactive Power Saving Function Figure 3. PPS Function Block Diagram Figure 4. PPS Assertion/Deassertion Timing Chart PPS Function Programming Timer Function Description Figure 5. Timer Functions OE Pin Function Table 8. OE Pin Functions Table 9. OE Pin Function Summary Table 10. PD# Priority Reference Input and Selection Crystal Input (X1/X2) Table 11. Programmable Tuning Caps Spread Spectrum Analog Spread Spectrum Digital Spread Spectrum Figure 6. Digital Spread Spectrum VBAT Table 12. VBAT Switching Threshold ORT–VCO Overshoot Reduction Technology PLL Features and Descriptions Table 13. Output 1 Divider Table 14. Output 2, 4, and 5 Divider Table 15. Output 3 Divider Output Clock Test Conditions Figure 7. LVCMOS Output Test Conditions Figure 8. LP-HCSL Output Test Conditions Absolute Maximum Ratings Table 16. Absolute Maximum Ratings Recommended Operating Conditions Table 17. Recommended Operating Conditions Electrical Characteristics Table 18. Input Capacitance, LVCMOS Output Impedance, and Internal Pull-down Resistance Table 19. Crystal Characteristics Table 20. DC Electrical Characteristics (Industrial)1,2 Table 21. DC Electrical Characteristics (Automotive)1,2 Table 22. Input Parameters1,2 Table 23. Power Consumption of 32.768kHz Output Only Operation Table 24. DC Electrical Characteristics – 3.3V LVCMOS Table 25. DC Electrical Characteristics – 2.5V LVCMOS Table 26. DC Electrical Characteristics – 1.8V LVCMOS Table 27. Electrical Characteristics – DIF 0.7V LPHCSL Differential Outputs Table 28. Electrical Characteristics – LVDS Table 29. Electrical Characteristics – LVPECL Figure 9. Output Differential Voltage Swing AC Electrical Characteristics Table 30. AC Electrical Characteristics PCI Express Jitter Specifications Table 31. PCI Express Jitter Specifications Spread Spectrum Generation Specifications Table 32. Spread Spectrum Generation Specifications I2C Bus Characteristics Table 33. I2C Bus DC Characteristics Table 34. I2C Bus AC Characteristics I2C Mode Operations Figure 10. I2C Slave Read and Write Cycle Sequencing Glossary of Features Table 35. Glossary of Features Package Outline Drawings Marking Diagrams (industrial) Marking Diagrams (automotive) Ordering Information Revision History