Datasheet KSZ8895MQX, KSZ8895RQX KSZ8895FQX, KSZ8895MLX (Microchip) - 9

KSZ8895MQX/RQX/FQX/MLX TABLE 2-1: SIGNALS - KSZ8895MQX/RQX/FQX/MLX (CONTINUED) Type, Pin Pin Note Port Pin Function, Note 2-2 Number Name 2-1
33 RXM5 I 5 Physical receive signal - (differential). 34 GNDA GND — Analog ground. 35 TXP5 O 5 Physical transmit signal + (differential). 36 TXM5 O 5 Physical transmit signal - (differential). 37 VDDAT P — 3.3V analog VDD. FQX: This pin can be floating when port 3 is used as copper port (default). Port 3 can be set to fiber mode by Register 239 bit [7], this 38 NC/FXSD3 IPD 3 pin is used for fiber signal detect pin on Port 3 in Fiber mode. MQX/RQX/MLX: no connection. FQX: Fiber signal detect pin for Port 4. 39 FXSD4 IPD 4 MQX/RQX/MLX: no connection. 40 NC NC — No connection. Leave NC pin floating. 41 NC NC — No connection. Leave NC pin floating. 42 NC NC — No connection. Leave NC pin floating. 43 NC NC — No connection. Leave NC pin floating. 44 NC NC — No connection. Leave NC pin floating. 45 NC NC — No connection. Leave NC pin floating. 46 NC NC — No connection. Leave NC pin floating. 47 PWRDN_N IPU — Full-chip power down. Active low. 48 INTR_N OPU — Interrupt. This pin is Open-Drain output pin. 49 GNDD GND — Digital ground. 50 VDDC P — 1.2V digital core VDD. 51 PMTXEN IPD 5 PHY [5] MII/RMII transmit enable. MQX/FQX/MLX: PHY [5] MII transmit bit 3. 52 PMTXD3 IPD 5 RQX: no connection for RMII. MQX/FQX/MLX: PHY [5] MII transmit bit 2. 53 PMTXD2 IPD 5 RQX: no connection for RMII. 54 PMTXD1 IPD 5 PHY [5] MII/RMII transmit bit 1. 55 PMTXD0 IPD 5 PHY [5] MII/RMII transmit bit 0. MQX/FQX/MLX: PHY [5] MII transmit error. 56 PMTXER IPD 5 RQX: no connection for RMII. MQX/FQX/MLX: Output PHY [5] MII transmit clock PMTXC/ 57 I/O 5 RQX: Input PHY [5] RMII reference clock, 50 MHz ±50 ppm, the PMREFCLK 50 MHz clock comes from PMRXC Pin 60. 58 GNDD GND — Digital ground.  2016 - 2019 Microchip Technology Inc. DS00002246B-page 9 Document Outline 1.0 Introduction 1.1 General Description 2.0 Pin Description and Configuration 3.0 Functional Description 3.1 Physical Layer Transceiver 3.2 Power 3.3 Power Management 3.4 Switch Core 3.5 Advanced Functionality 3.6 MII Management (MIIM) Interface 3.7 Serial Management Interface (SMI) 4.0 Register Descriptions 4.1 Global Registers 4.2 Port Registers 4.3 Advanced Control Registers 4.4 Static MAC Address Table 4.5 VLAN Table 4.6 Dynamic MAC Address Table 4.7 Management Information Base (MIB) Counters 4.8 MIIM Registers 5.0 Operational Characteristics 5.1 Absolute Maximum Ratings* 5.2 Operating Ratings*** 6.0 Electrical Characteristics 7.0 Timing Diagrams 7.1 EEPROM Timing 7.2 SNI Timing 7.3 MII Timing 7.4 RMII Timing 7.5 SPI Timing 7.6 Auto-Negotiation Timing 7.7 MDC/MDIO Timing 7.8 Reset Timing 8.0 Reset Circuit 9.0 Selection of Isolation Transformer, (Note 9-1) 10.0 Package Outline Appendix A: Data Sheet Revision History The Microchip Website Customer Change Notification Service Customer Support Product Identification System Worldwide Sales and Service