Datasheet ADE7816 (Analog Devices) - 8

ADE7816 Data Sheet ABSOLUTE MAXIMUM RATINGS
TA = 25°C, unless otherwise noted. Regarding the temperature profile used in soldering RoHS- compliant parts, Analog Devices, Inc., advises that reflow profiles
Table 5.
should conform to J-STD-20 from JEDEC. Refer to the JEDEC
Parameter Rating
website for the latest revision. VDD to AGND −0.3 V to +3.7 V
THERMAL RESISTANCE
VDD to DGND −0.3 V to +3.7 V Analog Input Voltage to AGND, IAP, IAN, −2 V to +2 V θJA is specified for the worst-case conditions, that is, a device IBP, IBN, ICP, ICN, IDP, IEP, IFP, IN soldered in a circuit board for surface-mount packages. Analog Input Voltage to VP and VN −2 V to +2 V Reference Input Voltage to AGND −0.3 V to VDD + 0.3 V
Table 6. Thermal Resistance
Digital Input Voltage to DGND −0.3 V to VDD + 0.3 V
Package Type θJA θJC Unit
Digital Output Voltage to DGND −0.3 V to VDD + 0.3 V 40-Lead LFCSP 29.3 1.8 °C/W Operating Temperature Industrial Range −40°C to +85°C
ESD CAUTION
Storage Temperature Range −65°C to +150°C Junction Temperature 150°C Stresses at or above those listed under Absolute Maximum Ratings may cause permanent damage to the product. This is a stress rating only; functional operation of the product at these or any other conditions above those indicated in the operational section of this specification is not implied. Operation beyond the maximum operating conditions for extended periods may affect product reliability. Rev. B | Page 8 of 48 Document Outline Features General Description Functional Block Diagram Revision History Specifications Timing Characteristics I2C-Compatible Interface Timing SPI Interface Timing HSDC Interface Timing Load Circuit for All Timing Specifications Absolute Maximum Ratings Thermal Resistance ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics Test Circuit Terminology Quick Start Inputs Power and Ground VDD and AGND, DGND Reference Circuit REFIN/OUT Reset Hardware Reset Software Reset Functionality CLKIN and CLKOUT Analog Inputs Input Pins PGA Gain Digital Integrator Antialiasing Filters Energy Measurements Starting and Stopping the DSP Active Energy Measurement Definition of Active Power and Active Energy Active Energy Registers Active Energy Threshold Energy Accumulation and Register Roll-Over Reactive Energy Measurement Definition of Reactive Power and Reactive Energy Reactive Energy Registers Reactive Energy Threshold Reactive Energy Accumulation and Register Roll-Over Line Cycle Accumulation Mode Root Mean Square Measurement No Load Detection Setting the No Load Thresholds No Load Interrupt Energy Calibration Channel Matching Energy Gain Calibration Energy Offset Calibration Energy Phase Calibration RMS Offset Calibration Power Quality Features Selecting a Current Channel Group Instantaneous Waveforms Zero-Crossing Detection Zero-Crossing Detection Zero-Crossing Timeout Peak Detection Setting the PEAKCYC Register Overcurrent and Overvoltage Detection Setting the OVLVL and OILVL Registers Overvoltage and Overcurrent Interrupts Indication of Power Direction Angle Measurements Period Measurement Voltage Sag Detection Setting the SAGCYC Register Setting the SAGLVL Register Voltage Sag Interrupt Checksum Layout Guidelines Crystal Circuit Outputs Interrupts Communication Serial Interface Selection I2C-Compatible Interface I2C Write Operation I2C Read Operation SPI-Compatible Interface SPI Read Operation SPI Write Operation HSDC Interface Registers Register Protection Register Format Register Maps Register Descriptions Interrupt Enable and Interrupt Status Registers Outline Dimensions Ordering Guide