Datasheet ADP1031 (Analog Devices) - 3
| 制造商 | Analog Devices |
| 描述 | Three-Channel, Isolated Micropower Management Unit with Seven Digital Isolators |
| 页数 / 页 | 38 / 3 — Data Sheet. ADP1031. SPECIFICATIONS. Table 1. Parameter. Symbol. Min. … |
| 修订版 | A |
| 文件格式/大小 | PDF / 1.5 Mb |
| 文件语言 | 英语 |
Data Sheet. ADP1031. SPECIFICATIONS. Table 1. Parameter. Symbol. Min. Typ. Max. Unit. Test Conditions/Comments
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Data Sheet ADP1031 SPECIFICATIONS
VINP voltage (VINP) = 24 V, MVDD voltage (VMVDD) = 3.3 V, SVDDx voltage (VSVDDx) = 3.3 V, VOUT1 voltage (VOUT1) = 24 V, VOUT2 voltage (VOUT2) = 5.15 V, VOUT3 voltage (VOUT3) = −15 V, and TA = 25°C for typical specifications. Minimum and maximum specification apply over the entire operating range of 4.5 V ≤ VINP ≤ 60 V, 2.3 V ≤ VMVDD ≤ 5.5 V, 1.8 V ≤ VSVDDx ≤ 5.5 V, and −40°C ≤ TJ ≤ +125°C, unless otherwise noted.
Table 1. Parameter Symbol Min Typ Max Unit Test Conditions/Comments
INPUT SUPPLY VOLTAGE RANGE VINP VINP 4.5 60 V MVDD VMVDD 2.3 5.5 V SVDDx VSVDDx 1.8 5.5 V Applies to SVDD1 and SVDD2 OUTPUT POWER AND EFFICIENCY Transformer = 750316743 Total Output Power 1720 mW VOUT1 current (IOUT1) = 70 mA, VOUT2 current (IOUT2) = 7 mA, VOUT3 current (IOUT3) = −0.3 mA 520 mW IOUT1 = 20 mA, IOUT2 = 7 mA, IOUT3 = −0.3 mA Efficiency 88.8 % IOUT1 = 70 mA, IOUT2 = 7 mA, IOUT3 = −0.3 mA 84.8 % IOUT1 = 20 mA, IOUT2 = 7 mA, IOUT3 = −0.3 mA Power Dissipation 216.5 mW IOUT1 = 70 mA, IOUT2 = 7 mA, IOUT3 = −0.3 mA 93.1 mW IOUT1 = 20 mA, IOUT2 = 7 mA, IOUT3 = −0.3 mA QUIESCENT CURRENT VINP Operating Current IQ_VINP 1.77 mA Normal operation, VOUT1, VOUT2, VOUT3 = no load Shutdown Current ISHDN_VINP 125 175 µA EN voltage (VEN) = 0 V MVDD SPI Active Mode I 1 Q_MVDD (SPI_ACTIVE) 4.1 6.5 mA VIx = logic low, MSS = logic low 9.2 14 mA V 1 Ix = logic high, MSS = logic low SPI Low Power Mode I 1 Q_MVDD (SPI_LOWPWR) 1.6 2.5 mA VIx = logic low, MSS = logic high 1.6 2.5 mA V 1 Ix = logic high, MSS = logic high SVDD1 SPI Active Mode I 1 Q_SVDD1 (SPI_ACTIVE) 1.8 2.7 mA VIx = logic low, SSS = logic low 5.7 8.6 mA V 1 Ix = logic high, SSS = logic low SPI Low Power Mode I 1 Q_SVDD1 (SPI_LOWPWR) 1.8 2.7 mA VIx = logic low, SSS = logic high 1.8 2.7 mA V 1 Ix = logic high, SSS = logic high SVDD2 I 1 Q_SVDD2 39 85 µA VIx = logic low 2 2.5 mA V 1 Ix = logic high UVLO VINP Relative to PGNDP Rising Threshold VUVLO_FLYBACK (RISE) 4.44 4.49 V Falling Threshold VUVLO_FLYBACK (FALL) 4.29 4.34 V Hysteresis 100 mV MVDD Relative to MGND Rising Threshold VUVLO_MVDD (RISE) 2.14 2.28 V Falling Threshold VUVLO_MVDD (FALL) 1.9 2 V Hysteresis 140 mV Rev. A | Page 3 of 38 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION TYPICAL APPLICATION CIRCUIT COMPANION PRODUCTS TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS REGULATORY INFORMATION ELECTROMAGNECTIC COMPATIBILITY INSULATION AND SAFETY RELATED SPECIFICATIONS DIN V VDE 0884-10 (VDE V 0884-10) INSULATION CHARACTERISTICS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION FLYBACK REGULATOR Flyback Regulator Operation Power Saving Mode (PSM) Flyback Undervoltage Lockout (UVLO) Flyback Regulator Precision Enable Control Flyback Regulator Soft Start Flyback Slew Rate Control Flyback Regulator Overcurrent Protection Flyback Regulator Overvoltage Protection BUCK REGULATOR Buck Regulator Operation Buck Regulator UVLO Buck Regulator Soft Start Buck Regulator Current-Limit Protection Buck Regulator OVP Buck Regulator Active Pull-Down Resistor INVERTING REGULATOR Inverting Regulator Operation Inverting Regulator UVLO Inverting Regulator Soft Start Inverting Regulator Current-Limit Protection Inverting Regulator OVP Inverting Regulator Active Pull-Down Resistor POWER GOOD POWER-UP SEQUENCE OSCILLATOR AND SYNCHRONIZATION THERMAL SHUTDOWN DATA ISOLATION High Speed SPI Channels GPIO Data Channels APPLICATIONS INFORMATION COMPONENT SELECTION Feedback Resistors Capacitor Selection FLYBACK REGULATOR COMPONENTS SELECTION Input Capacitor Output Capacitor Ripple Current vs. Capacitor Value Schottky Diode Transformer Turn Ratio Primary Inductance Flyback Transformer Saturation Current Series Winding Resistance Leakage Inductance and Clamping Circuits Clamping Resistor Clamping Capacitor Clamping Diode Diode Zener Diode Clamp Ripple Current (IAC) vs. Inductance Maximum Output Current Calculation BUCK REGULATOR COMPONENTS SELECTION Inductor Output Capacitor INVERTING REGULATOR COMPONENT SELECTION Inductor Output Capacitor Inverting Regulator Stability INSULATION LIFETIME Surface Tracking Insulation Wear Out Calculation and Use of Parameters Example THERMAL ANALYSIS TYPICAL APPLICATION CIRCUIT PCB LAYOUT CONSIDERATIONS OUTLINE DIMENSIONS ORDERING GUIDE
Data Sheet ADP1031 SPECIFICATIONS
VINP voltage (VINP) = 24 V, MVDD voltage (VMVDD) = 3.3 V, SVDDx voltage (VSVDDx) = 3.3 V, VOUT1 voltage (VOUT1) = 24 V, VOUT2 voltage (VOUT2) = 5.15 V, VOUT3 voltage (VOUT3) = −15 V, and TA = 25°C for typical specifications. Minimum and maximum specification apply over the entire operating range of 4.5 V ≤ VINP ≤ 60 V, 2.3 V ≤ VMVDD ≤ 5.5 V, 1.8 V ≤ VSVDDx ≤ 5.5 V, and −40°C ≤ TJ ≤ +125°C, unless otherwise noted.
Table 1. Parameter Symbol Min Typ Max Unit Test Conditions/Comments
INPUT SUPPLY VOLTAGE RANGE VINP VINP 4.5 60 V MVDD VMVDD 2.3 5.5 V SVDDx VSVDDx 1.8 5.5 V Applies to SVDD1 and SVDD2 OUTPUT POWER AND EFFICIENCY Transformer = 750316743 Total Output Power 1720 mW VOUT1 current (IOUT1) = 70 mA, VOUT2 current (IOUT2) = 7 mA, VOUT3 current (IOUT3) = −0.3 mA 520 mW IOUT1 = 20 mA, IOUT2 = 7 mA, IOUT3 = −0.3 mA Efficiency 88.8 % IOUT1 = 70 mA, IOUT2 = 7 mA, IOUT3 = −0.3 mA 84.8 % IOUT1 = 20 mA, IOUT2 = 7 mA, IOUT3 = −0.3 mA Power Dissipation 216.5 mW IOUT1 = 70 mA, IOUT2 = 7 mA, IOUT3 = −0.3 mA 93.1 mW IOUT1 = 20 mA, IOUT2 = 7 mA, IOUT3 = −0.3 mA QUIESCENT CURRENT VINP Operating Current IQ_VINP 1.77 mA Normal operation, VOUT1, VOUT2, VOUT3 = no load Shutdown Current ISHDN_VINP 125 175 µA EN voltage (VEN) = 0 V MVDD SPI Active Mode I 1 Q_MVDD (SPI_ACTIVE) 4.1 6.5 mA VIx = logic low, MSS = logic low 9.2 14 mA V 1 Ix = logic high, MSS = logic low SPI Low Power Mode I 1 Q_MVDD (SPI_LOWPWR) 1.6 2.5 mA VIx = logic low, MSS = logic high 1.6 2.5 mA V 1 Ix = logic high, MSS = logic high SVDD1 SPI Active Mode I 1 Q_SVDD1 (SPI_ACTIVE) 1.8 2.7 mA VIx = logic low, SSS = logic low 5.7 8.6 mA V 1 Ix = logic high, SSS = logic low SPI Low Power Mode I 1 Q_SVDD1 (SPI_LOWPWR) 1.8 2.7 mA VIx = logic low, SSS = logic high 1.8 2.7 mA V 1 Ix = logic high, SSS = logic high SVDD2 I 1 Q_SVDD2 39 85 µA VIx = logic low 2 2.5 mA V 1 Ix = logic high UVLO VINP Relative to PGNDP Rising Threshold VUVLO_FLYBACK (RISE) 4.44 4.49 V Falling Threshold VUVLO_FLYBACK (FALL) 4.29 4.34 V Hysteresis 100 mV MVDD Relative to MGND Rising Threshold VUVLO_MVDD (RISE) 2.14 2.28 V Falling Threshold VUVLO_MVDD (FALL) 1.9 2 V Hysteresis 140 mV Rev. A | Page 3 of 38 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION TYPICAL APPLICATION CIRCUIT COMPANION PRODUCTS TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS REGULATORY INFORMATION ELECTROMAGNECTIC COMPATIBILITY INSULATION AND SAFETY RELATED SPECIFICATIONS DIN V VDE 0884-10 (VDE V 0884-10) INSULATION CHARACTERISTICS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION FLYBACK REGULATOR Flyback Regulator Operation Power Saving Mode (PSM) Flyback Undervoltage Lockout (UVLO) Flyback Regulator Precision Enable Control Flyback Regulator Soft Start Flyback Slew Rate Control Flyback Regulator Overcurrent Protection Flyback Regulator Overvoltage Protection BUCK REGULATOR Buck Regulator Operation Buck Regulator UVLO Buck Regulator Soft Start Buck Regulator Current-Limit Protection Buck Regulator OVP Buck Regulator Active Pull-Down Resistor INVERTING REGULATOR Inverting Regulator Operation Inverting Regulator UVLO Inverting Regulator Soft Start Inverting Regulator Current-Limit Protection Inverting Regulator OVP Inverting Regulator Active Pull-Down Resistor POWER GOOD POWER-UP SEQUENCE OSCILLATOR AND SYNCHRONIZATION THERMAL SHUTDOWN DATA ISOLATION High Speed SPI Channels GPIO Data Channels APPLICATIONS INFORMATION COMPONENT SELECTION Feedback Resistors Capacitor Selection FLYBACK REGULATOR COMPONENTS SELECTION Input Capacitor Output Capacitor Ripple Current vs. Capacitor Value Schottky Diode Transformer Turn Ratio Primary Inductance Flyback Transformer Saturation Current Series Winding Resistance Leakage Inductance and Clamping Circuits Clamping Resistor Clamping Capacitor Clamping Diode Diode Zener Diode Clamp Ripple Current (IAC) vs. Inductance Maximum Output Current Calculation BUCK REGULATOR COMPONENTS SELECTION Inductor Output Capacitor INVERTING REGULATOR COMPONENT SELECTION Inductor Output Capacitor Inverting Regulator Stability INSULATION LIFETIME Surface Tracking Insulation Wear Out Calculation and Use of Parameters Example THERMAL ANALYSIS TYPICAL APPLICATION CIRCUIT PCB LAYOUT CONSIDERATIONS OUTLINE DIMENSIONS ORDERING GUIDE